44
μ
PD753204, 753206, 753208
(3) Explanation of symbols under addressing area column
*1
MB = MBEMBS
(MBS = 0, 1, 15)
*2
MB = 0
*3
MBE = 0 : MB = 0 (000H-07FH)
MB = 15 (F80H-FFFH)
MBE = 1 : MB = MBS (MBS = 0, 1, 15)
Data memory addressing
*4
MB = 15, fmem = FB0H-FBFH, FF0H-FFFH
*5
MB = 15, pmem = FC0H-FFFH
*6
μ
PD753204
addr = 000H-FFFH
μ
PD753206
addr = 0000H-17FFH
μ
PD753208
addr = 0000H-1FFFH
*7
addr, addr1 = (Current PC) – 15 to (Current PC) – 1
(Current PC) + 2 to (Current PC) + 16
*8
μ
PD753204
caddr = 000H-FFFH
μ
PD753206
caddr = 0000H-0FFFH(PC
12
= 0) or
1000H-17FFH(PC
12
= 1)
Program memory addressing
μ
PD753208
caddr = 0000H-0FFFH(PC
12
= 0) or
1000H-1FFFH(PC
12
= 1)
*9
faddr = 0000H-07FFH
*10
taddr = 0020H-007FH
*11
μ
PD753204
addr1 = 000H-FFFH
μ
PD753206
addr1 = 0000H-17FFH
μ
PD753208
addr1 = 0000H-1FFFH
Remarks
1.
MB indicates memory bank that can be accessed.
2.
In *2, MB = 0 independently of how MBE and MBS are set.
3.
In *4 and *5, MB = 15 independently of how MBE and MBS are set.
4.
*6 to *11 indicate the areas that can be addressed.
(4) Explanation of number of machine cycles column
S denotes the number of machine cycles required by skip operation when a skip instruction is executed.
The value of S varies as follows.
When no skip is made: S = 0
When the skipped instruction is a 1- or 2-byte instruction: S = 1
When the skipped instruction is a 3-byte instruction
Note
: S = 2
Note
3-byte instruction: BR !addr, BRA !addr1, CALL !addr or CALLA !addr1 instruction
Caution The GETI instruction is skipped in one machine cycle.
One machine cycle is equal to one cycle of CPU clock (= t
CY
); time can be selected from among four types
by setting PCC.