
22
μ
PD75237
2.3
MEMORY MAPPED I/O
As shown in Fig. 2-1, the
μ
PD75237 employs the memory mapped I/O with the peripheral hardware including
input/output ports and timers mapped at addresses F80H to FFFH in the data memory space. Thus, there are no
special instructions to control the peripheral hardware and all operations are controlled by memory manipulation
instructions. (Some hardware control mnemonics are available to make the program easy to understand.)
When operating the peripheral hardware, the addressing modes listed in Table 2-3 can be used.
Manipulate the display data memory, key scan register and port H mapped at addresses 1A0H to 1FFH by
specifying memory bank 1.
Table 2-3 Addressing Modes Applicable when Operating the
Peripheral Hardware at Addresses F80H to FFFH
Applicable Addressing Mode
Specify by direct addressing mem.bit with MBE = 0 or
(MBE = 1, MBS = 15)
Specify by direct addressing fmem.bit irrespective of
MBE and MBS
Specify by indirect addressing pmem.@L irrespective
of MBE and MBS
Specify by direct addressing mem with MBE = 0 or
(MBE = 1, MBS = 15)
Specify by register indirect addressing @HL with
(MBE = 1, MBS = 15)
Specify by direct addressing mem with MBE = 0 or
(MBE = 1, MBS = 15) (mem is an even address.)
Specify by register indirect addressing @HL with
MBE = 1 and MBS = 15 (L register contents are even.)
Applicable Hardware
All hardware devices enabled for bit
manipulation
IST0, IST1, MBE, RBE,
IE
×××
, IRQ
×××
, PORTn. 0 to 3
PORTn.
All hardware devices enabled for 4-bit
manipulation
All hardware devices enabled for 8-bit
manipulation
Bit manipulation
4-bit manipulation
8-bit manipulation
Table 2-4 shows the
μ
PD75237 I/O map.
In the table, each item has the following meanings:
Symbol............. Name indicating the on-chip hardware address.
Can be described in the instruction operand column.
R/W ................... Indicates whether the corresponding hardware is enabled for read/write.
R/W : Read/write enable
R
: Read only
W
: Write only
No. of manipulatable bits........ Indicates the number of applicable bits before operating the correspond-
ing hardware.
Bit manipulated addressing.... Indicates the applicable bit manipulated addressing before operating the
applicable hardware.