- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376430 > UPD75066 (NEC Corp.) 4-BIT SINGLE-CHIP MICROCOMPUTER PDF資料下載
參數(shù)資料
| 型號(hào)： | UPD75066 |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 30/68頁 |
| 文件大小： | 640K |
| 代理商： | UPD75066 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁當(dāng)前第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁
30
μ
PD75064, 75066, 75068, 75064(A), 75066(A), 75068(A)
RESET input in standby mode
Contents of lower 4 bits of address 0000H
in program memory are set to PC11 - 8,
and that of 0001H are set to PC7 - 0.
Contents of lower 5 bits of address 0000H
in program memory are set to PC12 - 8,
and that of 0001H are set to PC7 - 0.
Retained
0
0
The contents of bit 7 of address 0000H
of the program memory is set to MBE.
Undefined
Retained
Note
Retained
0
Undefined
0
0
FFH
0
0, 0
0
Counter (BT)
Mode register (BTM)
Counter (T0)
Modulo register (TMOD0)
Mode register (TM0)
TOE0, TOUT F/F
Mode register (WM)
Basic interval
timer
Timer/event
counter
Watch timer
8. RESET OPERATION
When the RESET signal is input, the
μ
PD75068 is reset and all hardware is initialized as indicated in Table
8-1. Figure 8-1 shows the reset operation timing.
Figure 8-1. Reset Operation by RESET Input
Table 8-1. Status of All Hardware after Reset (1/2)
RESET input during operation
Same operation as that in
standby state
Same operation as that in
standby state
Undefined
0
0
Same operation as that in
standby state
Undefined
Undefined
Undefined
0
Undefined
0
0
FFH
0
0, 0
0
Note
Data of address 0F8H to 0FDH of the data memory becomes undefined when the RESET signal is input.
Hardware
Program counter (PC)
μ
PD75064
μ
PD75066
μ
PD75068
PSW
Carry flag (CY)
Skip flag (SK0-2)
Interrupt status flag (IST0)
Bank enable flag (MBE)
Stack pointer (SP)
Data memory (RAM)
General purpose register
(X, A, H, L, D, E, B, C)
Bank selection register (MBS)
RESET input
Operation mode or
standby mode
HALT mode
Operation mode
Internal reset operation
Wait
(Approx. 31.3 ms/4.19 MHz)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| UPD75066A | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75066GB | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75066GBA | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75068 | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| UPD75068A | 4-BIT SINGLE-CHIP MICROCOMPUTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD7507C189 | 制造商:Panasonic Industrial Company 功能描述:IC |
| UPD7508CU265 | 制造商:Panasonic Industrial Company 功能描述:IC |
| UPD75208 | 制造商:Panasonic Industrial Company 功能描述:IC |
| UPD753012AGC-P33-8BT-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD753016AGC-P29-8BT | 制造商:Renesas Electronics Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。