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參數(shù)資料
| 型號： | UPD75036CW |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 37/58頁 |
| 文件大?。?/td> | 485K |
| 代理商： | UPD75036CW |
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37
μ
PD75036
Group
Memory
bit
manipula-
tion
Branch
Subrou-
tine
stack
control
Interrupt
control
Input/
output
CPU
control
Mne-
monic
XOR1
BR
BRCB
CALL
CALLF
RET
RETS
RETI
PUSH
POP
EI
DI
IN
Note
OUT
Note
HALT
STOP
NOP
Operand
CY, fmem.bit
CY, pmem.@L
CY, @H+mem.bit
addr
!addr
$addr
!caddr
!addr
!faddr
rp
BS
rp
BS
IE
×××
IE
×××
A, PORTn
XA, PORTn
PORTn, A
PORTn, XA
Bytes
2
2
2
–
3
1
2
3
2
1
1
1
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
Machin-
ing
cycle
2
2
2
–
3
2
2
3
2
3
3 + S
3
1
2
1
2
2
2
2
2
2
2
2
2
2
2
1
Skip
condition
Uncondi-
tional
Address-
ing area
*4
*5
*1
*6
*6
*7
*8
*6
*9
Operation
CY
←
CY
∨
(fmem.bit)
CY
←
CY
∨
(pmem
7-2
+ L
3-2
.bit(L
1-0
))
CY
←
CY
∨
(H + mem
3-0
.bit)
PC
13-0
←
addr
(Appropriate instructions are
selected from BR !addr, BRCB
!caddr, and BR $addr by the
assembler.)
PC
13-0
←
addr
PC
13-0
←
addr
PC
13-0
←
PC
13, 12
+ caddr
11-0
(SP – 4)(SP – 1)(SP – 2)
←
PC
11-0
(SP – 3)
←
MBE, 0, PC
13
, PC
12
PC
13-0
←
addr, SP
←
SP – 4
(SP – 4)(SP – 1)(SP – 2)
←
PC
11-0
(SP–3)
←
MBE, 0, PC
13
, PC
12
PC
13-0
←
000, faddr, SP
←
SP – 4
MBE, 0, PC
13
, PC
12
←
(SP + 1)
PC
11-0
←
(SP)(SP + 3)(SP + 2)
SP
←
SP + 4
MBE, 0, PC
13
, PC
12
←
(SP + 1)
PC
11-0
←
(SP)(SP + 3)(SP + 2)
SP
←
SP + 4, then skip unconditionally
MBE, 0, PC
13
, PC
12
←
(SP + 1)
PC
11-0
←
(SP)(SP + 3)(SP + 2)
PSW
←
(SP + 4)(SP + 5), SP
←
SP + 6
(SP – 1)(SP – 2)
←
rp, SP
←
SP – 2
(SP – 1)
←
MBS, (SP – 2)
←
0, SP
←
SP – 2
rp
←
(SP + 1)(SP), SP
←
SP + 2
MBS
←
(SP + 1), SP
←
SP + 2
IME
←
1
IE
×××
←
1
IME
←
0
IExxx
←
0
A
←
PORTn
(n = 0 - 11)
XA
←
PORTn
+1
,PORTn (n = 4, 6)
PORTn
←
A
(n = 2 - 10)
PORTn
+1
,PORTn
←
XA (n = 4, 6)
Set HALT Mode (PCC.2
←
1)
Set STOP Mode (PCC.3
←
1)
No Operation
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