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參數(shù)資料
| 型號： | UPD70F3035AYGF-3BA |
| 廠商： | NEC Corp. |
| 英文描述： | V850/SB2TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | V850/SB2TM 32-/16-BIT單晶片微控制器 |
| 文件頁數(shù)： | 23/56頁 |
| 文件大?。?/td> | 356K |
| 代理商： | UPD70F3035AYGF-3BA |
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Data Sheet U14780EJ1V0DS00
23
μ
PD703034A, 703034AY, 703035A, 703035AY, 70F3035A, 70F3035AY
Cautions
1. Do not directly connect the output (or I/O) pins of IC products to each other, or to V
DD
, V
CC
,
and GND. Open-drain pins or open-collector pins, however, can be directly connected to
each other. Direct connection of the output pins between an IC product and an external
circuit is possible, if the output pins can be set to the high-impedance state and the output
timing of the external circuit is designed to avoid output conflict.
2. Product quality may suffer if the absolute maximum rating is exceeded even momentarily for
any parameter. That is, the absolute maximum ratings are rated values at which the product
is on the verge of suffering physical damage, and therefore the product must be used under
conditions that ensure that the absolute maximum ratings are not exceeded.
The ratings and conditions indicated for DC characteristics and AC characteristics represent
the quality assurance range during normal operation.
Capacitance (T
A
= 25°C)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Input capacitance
C
I
15
pF
I/O capacitance
C
IO
15
pF
Output capacitance
C
O
f
C
= 1 MHz
Unmeasured pins returned to 0 V
15
pF
Operating Conditions
(1) Operating frequency
Operating Frequency (f
XX
)
V
DD
AV
DD
BV
DD
EV
DD
Remark
2 to 13 MHz
4.0 to 5.5 V
4.5 to 5.5 V
3.0 to 5.5 V
3.0 to 5.5 V
Note 1
Other than IDLE mode
4.0 to 5.5 V
4.5 to 5.5 V
3.0 to 5.5 V
3.0 to 5.5 V
–
32.768 kHz
IDLE mode
3.5 to 5.5 V
4.5 to 5.5 V
3.0 to 5.5 V
3.0 to 5.5 V
Note 2
Notes 1.
During STOP mode (subsystem oscillator operating), V
DD
= 3.5 to 5.5 V. Shifting to STOP mode or
restoring from STOP mode must be performed at V
DD
= 4.0 V min.
2.
Shifting to IDLE mode or restoring from IDLE mode must be performed at V
DD
= 4.0 V min.
(2) CPU operating frequency
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Main system clock operation
0.25
13
MHz
CPU operating frequency
f
CPU
Subsystem clock operation
32.768
kHz
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD70F3035AYGF-8EU | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| UPD70F3035B | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:V850/SB1(TM).V850/SB2(TM) for Hardware | UM Including Electrical Characteristics[02/2003] |
| UPD70F3035BY | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:V850 Series Pamphlet | Pamphlet[02/2002] |
| UPD70F3036H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:V850 Series Pamphlet | Pamphlet[02/2002] |
| UPD70F3036HY | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:V850 Series Pamphlet | Pamphlet[02/2002] |
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