
CHAPTER 16 CLOCKED SERIAL INTERFACE 0 (CSI0)
User
’
s Manual U15862EJ3V0UD
484
(11) Serial I/O shift register n (SIO0n)
The SIO0n register is a 16-bit shift register that converts parallel data into serial data.
The transfer operation is not started even if the SIO0n register is read.
These registers are read-only, in 16-bit units.
In addition to reset input, this register can also be initialized by clearing (0) the CSI0En bit of the CSIM0n
register.
Caution
Access the SIO0n register only when the 16-bit data length has been set (CCLn bit of
CSIM0n register = 1), and only in the idle state (CSOTn bit of CSIM0n register = 0). If
the SIO0n register is accessed during data transfer, the data cannot be guaranteed.
14
SIOn14
13
SIOn13
12
SIOn12
2
SIOn2
3
SIOn3
4
SIOn4
5
SIOn5
6
SIOn6
7
SIOn7
8
SIOn8
9
SIOn9
10
SIOn10
11
SIOn11
15
SIOn15
1
SIOn1
0
SIOn0
SIO0n
After reset: 0000H R Address: FFFFFD0AH, FFFFFD1AH, FFFFFD2AH
Remark
n = 0, 1 (V850ES/KF1, V850ES/KG1), n = 0 to 2 (V850ES/KJ1)
(12) Serial I/O shift register 0nL (SIO0nL)
The SIO0nL register is an 8-bit shift register that converts parallel data into serial data.
The transfer operation is not started even if the SIO0nL register is read.
These registers are read-only, in 8-bit or 1-bit units.
In addition to reset input, this register can also be initialized by clearing (0) the CSI0En bit of the CSIM0n
register.
The SIO0nL register is the same as the lower bytes of the SIO0n register.
Caution
Access the SIO0nL register only when the 8-bit data length has been set (CCLn bit of
CSIM0n register = 0), and only in the idle state (CSOTn bit of CSIM0n register = 0). If
the SIO0nL register is accessed during data transfer, the data cannot be guaranteed.
7
SIOn7
SIO0nL
6
SIOn6
5
SIOn5
4
SIOn4
3
SIOn3
2
SIOn2
1
SIOn1
0
SIOn0
After reset: 00H R Address: FFFFFD0AH, FFFFFD1AH, FFFFFD2AH
Remark
n = 0, 1 (V850ES/KF1, V850ES/KG1), n = 0 to 2 (V850ES/KJ1)