
1
μ
P
2
Data
transfer
MOV
LDEA
TRANS
XCH
MOVSPA
Note
MOVSPB
Note
reg,reg
mem,reg
reg,mem
mem,imm
reg,imm
acc,dmem
dmem,acc
sreg,reg16
sreg,mem16
reg16,sreg
mem16,sreg
DS0,reg16,
mem32
DS1,reg16,
mem32
AH,PSW
PSW,AH
reg16,mem16
src-table
reg,reg
mem,reg
reg,mem
AW,reg16
reg16,AW
reg16
Operation Code
1 0 0 0 1 0 1 W
1 0 0 0 1 0 0 W
1 0 0 0 1 0 1 W
1 1 0 0 0 1 1 W
1 0 1 1 W reg
1 0 1 0 0 0 0 W
1 0 1 0 0 0 1 W
1 0 0 0 1 1 1 0
1 0 0 0 1 1 1 0
1 0 0 0 1 1 0 0
1 0 0 0 1 1 0 0
1 1 0 0 0 1 0 1
1 1 0 0 0 1 0 0
1 0 0 1 1 1 1 1
1 0 0 1 1 1 1 0
1 0 0 0 1 1 0 1
1 1 0 1 0 1 1 1
1 0 0 0 0 1 1 W
1 0 0 0 0 1 1 W
1 0 0 1 0 reg
0 0 0 0 1 1 1 1
0 0 0 0 1 1 1 1
1 1 1 1 1 reg
7 6 5 4 3 2 1 0
1 1 reg reg
mod reg mem
mod reg mem
mod 0 0 0 mem
1 1 0 sreg reg
mod 0 sreg mem
1 1 0 sreg reg
mod 0 sreg mem
mod reg mem
mod reg mem
mod reg mem
1 1 reg reg
mod reg mem
0 0 1 0 0 1 0 1
1 0 0 1 0 1 0 1
7 6 5 4 3 2 1 0
Group
Mnemonic
Operand
2
2 to 4
2 to 4
3 to 6
2 to 3
3
3
2
2 to 4
2
2 to 4
2 to 4
2 to 4
1
1
2 to 4
1
2
2 to 4
1
2
3
Bytes
Flags
AC CY V
P
S
Z
reg
←
reg
(mem)
←
reg
reg
←
(mem)
(mem)
←
imm
reg
←
imm
When W = 0, AL
←
(dmem)
When W = 1, AH
←
(dmem + 1), AL
←
(dmem)
When W = 0, (dmem)
←
AL
When W = 1, (dmem + 1)
←
AH, (dmem)
←
AL
sreg
←
reg16
sreg
←
(mem16)
reg16
←
sreg
(mem16)
←
sreg
reg16
←
(mem32)
DS0
←
(mem32 + 2)
reg16
←
(mem32)
DS1
←
(mem32 + 2)
AH
←
S, Z, F1, AC, F0, P, IBRK, CY
S, Z, F1, AC, F0, P, IBRK, CY
←
AH
reg16
←
mem16
AL
←
(BW + AL)
reg
reg
(mem)
reg
AW
reg16
New register bank SS and SP
←
old register bank SS and SP
SS and SP of reg16-indicated new register bank
←
old register bank
SS and SP
Operation
sreg : SS, DS0, DS1
sreg : SS, DS0, DS1
×
×
×
×
×
Note
These instructions are newly added to the PD70108/70116.