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參數(shù)資料
| 型號： | UPD703032AYGF-XXX-3BA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 51/54頁 |
| 文件大小： | 507K |
| 代理商： | UPD703032AYGF-XXX-3BA |
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Data Sheet U14893EJ2V0DS
4
PD703032A, 703032AY, 70F3032A, 70F3032AY
PIN IDENTIFICATION
A1 to A21:
Address Bus
P80 to P83:
Port 8
AD0 to AD15:
Address/Data Bus
P90 to P96:
Port 9
ADTRG:
A/D Trigger Input
P100 to P107:
Port 10
ANI0 to ANI11:
Analog Input
P110 to P113:
Port 11
ASCK0, ASCK1:
Asynchronous Serial Clock
RD:
Read
ASTB:
Address Strobe
REGC:
Regulator Control
AVDD:
Analog Power Supply
RESET:
Reset
AVREF:
Analog Reference Voltage
RTP0 to RTP7:
Real-time Output Port
AVSS:
Analog Ground
RTPTRG:
RTP Trigger Input
BVDD:
Power Supply for Bus Interface
R/W:
Read/Write Status
BVSS:
Ground for Bus Interface
RXD0, RXD1:
Receive Data
CLKOUT:
Clock Output
SCK0 to SCK4:
Serial Clock
DSTB:
Data Strobe
SCL0, SCL1:
Serial Clock
EVDD:
Power Supply for Port
SDA0, SDA1:
Serial Data
EVSS:
Ground for Port
SI0 to SI4:
Serial Input
HLDAK:
Hold Acknowledge
SO0 to SO4:
Serial Output
HLDRQ:
Hold Request
TI00, TI01, TI10, :
Timer Input
IC:
Internally Connected
TI11, TI2 to TI5
INTP0 to INTP6:
Interrupt Request from Peripherals
TO0 to TO5:
Timer Output
KR0 to KR7:
Key Return
TXD0, TXD1:
Transmit Data
LBEN:
Lower Byte Enable
UBEN:
Upper Byte Enable
NMI:
Non-Maskable Interrupt Request
VDD:
Power Supply
P00 to P07:
Port 0
VPP:
Programming Power Supply
P10 to P15:
Port 1
VSS:
Ground
P20 to P27:
Port 2
WAIT:
Wait
P30 to P37:
Port 3
WRH:
Write Strobe High Level Data
P40 to P47:
Port 4
WRL:
Write Strobe Low Level Data
P50 to P57:
Port 5
X1, X2:
Crystal for Main Clock
P60 to P65:
Port 6
XT1, XT2:
Crystal for Sub-clock
P70 to P77:
Port 7
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