參數(shù)資料
型號： UPD703032AYGF-XXX-3BA
元件分類： 微控制器/微處理器
英文描述： 32-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 20 MM, PLASTIC, QFP-100
文件頁數(shù)： 19/54頁
文件大?。?/td> 507K
代理商： UPD703032AYGF-XXX-3BA
Data Sheet U14893EJ2V0DS
24
PD703032A, 703032AY, 70F3032A, 70F3032AY
Data Retention Characteristics (TA = –40 to +85 °C, VSS = AVSS = BVSS = EVSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Data retention voltage
VDDDR
STOP mode (all functions not
operating)
2.7
Note
5.5
V
PD703032A,
PD703032AY
870
A
Data retention current
IDDDR
VDD = VDDDR,
XT1 = VSS
(Subclock
stopped)
PD70F3032A,
PD70F3032AY
8
100
A
Power supply voltage rise time
tRVD
200
s
Power supply voltage fall time
tFVD
200
s
Power supply voltage hold time
(from STOP mode setting)
tHVD
0ms
STOP mode release signal input time
tDREL
0ms
Data retention high-level input voltage
VIHDR
All input ports
0.9VDDDR
VDDDR
V
Data retention low-level input voltage
VILDR
All input ports
0
0.1VDDDR
V
Note
During STOP mode (when only watch timer is operating), VDD = 3.5 to 5.5 V. Shifting to STOP mode or
restoring from STOP mode must be performed at VDD = 4.0 V min.
Remark
TYP. values are reference values for when TA = 25
°C.
tHVD
VDDDR
tDREL
VIHDR
tFVD
tRVD
VDD
STOP mode release interrupt (NMI, etc.)
(Release by falling edge)
STOP mode release interrupt (NMI, etc.)
(Release by rising edge)
Setting STOP mode
RESET (input)
VILDR
4.0 VNote
Note VDD = 4.0 V indicates the minimum operating voltage of the V850/SB1.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD703032B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:V850/SB1(TM).V850/SB2(TM) for Hardware | UM Including Electrical Characteristics[02/2003]
UPD703032BY 制造商:未知廠家 制造商全稱:未知廠家 功能描述:V850 Series Pamphlet | Pamphlet[02/2002]
UPD703033A 制造商:NEC 制造商全稱:NEC 功能描述:V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
UPD703033AGC 制造商:NEC 制造商全稱:NEC 功能描述:V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
UPD703033AGF 制造商:NEC 制造商全稱:NEC 功能描述:V850/SB1TM 32-/16-BIT SINGLE-CHIP MICROCONTROLLERS
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