參數(shù)資料
型號(hào)： UPD65971
英文描述： CMOS-9HD Family Ver.6.0 Design Manual | Design Manual[07/2001]
中文描述： CMOS的9HD家庭Ver.6.0設(shè)計(jì)手冊(cè)|設(shè)計(jì)手冊(cè)[07/2001]
文件頁(yè)數(shù)： 41/64頁(yè)
文件大?。?/td> 399K
代理商： UPD65971
41
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
MOV R0n, A
MOV R1n, A
<1> Instruction code
<2> Cycle count
<3> Function
The accumulator contents are transferred to register Rmn.
:
0 0 1 0 R
4
0 R
3
R
2
R
1
R
0
: 1
: (Rmn)
←
(A)
m = 0, 1
n = 0 to F
MOV Rn, #data8
<1> Instruction code
:
0 0 1 1 0 0 R
3
R
2
R
1
R
0
:
0 d
7
d
6
d
5
d
4
0 d
3
d
2
d
1
d
0
: 1
: (R1n-R0n)
←
data8
<2> Cycle count
<3> Function
The immediate data is transferred to the register. Using this instruction, registers operate as register
pairs.
The pair combinations are as follows:
R
0
: R
10
- R
00
R
1
: R
11
- R
01
:
R
E
: R
1E
- R
0E
R
F
: R
1F
- R
0F
Lower column
Higher column
n = 0 to F
MOV Rn, @R0
<1> Instruction code
<2> Cycle count
<3> Function
The program memory contents specified with control register P13 and register pair R
10
-R
00
are
transferred to register pair R1n-R0n. The program memory consists of 10 bits and has the following
state after the transfer to the register.
:
0 0 1 1 1 0 R
3
R
2
R
1
R
0
: 1
: (R1n-R0n)
←
((P13), R0))
n = 1 to F
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
@R0
→
R1n
R0n
Program memory
The high-order 2 bits of the program memory address is specified with the control register (P13).
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