參數(shù)資料
型號: UPD65948
英文描述: CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
中文描述: CMOS門陣列Array.Embedded的包版本2.0 |設(shè)計手冊[05/2003]
文件頁數(shù): 4/64頁
文件大?。?/td> 399K
代理商: UPD65948
4
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
CONTENTS
1.
PIN FUNCTIONS...............................................................................................................................
1.1
List of Pin Functions...............................................................................................................................
1.2
INPUT/OUTPUT Circuits of Pins ............................................................................................................
1.3
Dealing with Unused Pins ......................................................................................................................
6
6
7
8
2.
INTERNAL CPU FUNCTIONS..........................................................................................................
2.1
Program Counter (PC) ............................................................................................................................
2.2
Stack Pointer (SP) ...................................................................................................................................
2.3
Address Stack Register (ASR (RF)).......................................................................................................
2.4
Program Memory (ROM) ......................................................................................................................... 10
2.5
Data Memory (RAM) ................................................................................................................................ 10
2.6
Data Pointer (DP)..................................................................................................................................... 11
2.7
Accumulator (A) ...................................................................................................................................... 11
2.8
Arithmetic and Logic Unit (ALU)............................................................................................................ 12
2.9
Flags ......................................................................................................................................................... 12
2.9.1
Status flag (F)............................................................................................................................... 12
2.9.2
Carry flag (CY) ............................................................................................................................. 13
9
9
9
9
3.
PORT REGISTERS (PX)................................................................................................................... 14
3.1
K
I/O
Port (P0)............................................................................................................................................. 15
3.2
K
I
Port/Special Ports (P1) ....................................................................................................................... 16
3.2.1
K
I
port (P
11
: bits 4-7 of P1) ........................................................................................................... 16
3.2.2
S
0
port (bit 2 of P1)....................................................................................................................... 16
3.2.3
S
1
/LED (bit 3 of P1)...................................................................................................................... 16
3.2.4
S
2
port (bit 1 of P1)....................................................................................................................... 17
3.3
Control Register 0 (P3) ........................................................................................................................... 17
3.4
Control Register 1 (P4) ........................................................................................................................... 18
4.
TIMER ............................................................................................................................................... 19
4.1
Timer Configuration ................................................................................................................................ 19
4.2
Timer Operation....................................................................................................................................... 20
4.3
Carrier Output.......................................................................................................................................... 21
4.4
Software Control of Timer Output ......................................................................................................... 21
5.
STANDBY FUNCTION...................................................................................................................... 22
5.1
Outline of Standby Function .................................................................................................................. 22
5.2
Standby Mode Setup and Release......................................................................................................... 23
5.3
Standby Mode Release Timing .............................................................................................................. 25
6.
RESET............................................................................................................................................... 26
7.
POC CIRCUIT ................................................................................................................................... 27
7.1
Functions of POC Circuit........................................................................................................................ 28
7.2
Oscillation Check at Low Supply Voltage............................................................................................. 28
8.
SYSTEM CLOCK OSCILLATOR...................................................................................................... 29
相關(guān)PDF資料
PDF描述
UPD65964 CMOS-9HD Family.EA-9HD Family Block Library Ver.6.0 | Block Library[12/2000]
UPD65966 CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65968 CMOS-9HD Family.EA-9HD Family Block Library Ver.6.0 | Block Library[12/2000]
UPD65969 CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65970 CMOS-9HD Family.EA-9HD Family Block Library Ver.6.0 | Block Library[12/2000]
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD65948S1-068 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SYSTEM CONTROLLER
UPD65948S1-091 制造商:Compaq 功能描述:MULTIFUNCTION PERIPHERAL, PBGA256
UPD65949 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-9HD Family.EA-9HD Family Block Library Ver.6.0 | Block Library[12/2000]
UPD65949GD-050-LML 制造商:Renesas Electronics Corporation 功能描述:
UPD65949GM-058-JED 制造商:Renesas Electronics Corporation 功能描述: