參數(shù)資料
型號(hào)： UPD65658-QFP120P1.2SQ
英文描述： ASIC
中文描述： 專用集成電路
文件頁數(shù)： 45/64頁
文件大?。?/td> 399K
代理商： UPD65658-QFP120P1.2SQ
45
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
MOV T, @R0
<1> Instruction code
<2> Cycle count
<3> Function
Transfers the program memory contents to the timer register T (t
9
to t
0
) specified with the control register
P13 and the register pair R
10
-R
00
.
The program memory, which consists of 10 bits, is placed in the following state after the transfer to the
register.
:
0 0 1 1 1 1 1 1 1 1
: 1
: (T)
←
((P13), (R0))
t
9
t
8
t
7
t
6
t
5
t
4
t
3
t
2
t
1
t
0
T1
T0
t
1
t
0
t
9
t
8
t
7
t
6
t
5
t
4
t
3
t
2
@R
0
→
Program memory
Timer
T
The high-order 2 bits of the program memory address are specified with the control register (P13).
Caution When setting a timer value in the program memory, ensure to use the DT directive.
9.10 Others
HALT #data4
<1> Instruction code
:
0 0 0 1 0 1 0 0 0 1
:
0 0 0 0 0 0 d
3
d
2
d
1
d
0
: 1
: Sandby mode
<2> Cycle count
<3> Function
Places the CPU in standby mode.
The condition for having the standby mode (HALT/STOP mode) canceled is specified with the immediate
data.
STTS R0n
<1> Instruction code :
0 0 0 1 1 0 R
3
R
2
R
1
R
0
<2> Cycle count
<3> Function
: 1
: if statuses match
else
F
←
0
F
←
1
n = 0 to F
Compares the S
0
, S
1
, K
I/O
, K
I
, and TIMER statuses with the register R
0n
contents. If at least one of the
statuses coincides with the bits that have been set, the status flag F is set (to 1).
If none of them coincide, the status flag F is cleared (to 0).
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