參數(shù)資料
型號: UPD65567
英文描述: CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
中文描述: CMOS門陣列Array.Embedded的包版本2.0 |設(shè)計手冊[05/2003]
文件頁數(shù): 43/64頁
文件大小: 399K
代理商: UPD65567
43
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
9.8 Subroutine Instructions
The program memory consists of pages in steps of 1K (000H to 3FFH). However, as the assembler automatically
performs page optimization, it is unnecessary to designate pages. The pages allowed for each product are as
follows.
μ
PD64A (ROM: 1K steps)
μ
PD65 (ROM: 2K steps)
μ
PD6P5 (PROM: 2K steps) : pages 0, 1
: page 0
: pages 0, 1
CALL addr
<1> Instruction code
:
0 0 1 1 0 1 0 0 1 0
page 0
0 1 0 0 0 1 0 0 0 1
; page 1
0 1 0 0 1 1 0 0 0 1
a
9
a
7
a
6
a
5
a
4
a
8
a
3
a
2
a
1
a
0
: 2
: SP
SP + 1
ASR
PC
PC
addr
<2> Cycle count
<3> Function
Increments (+1) the stack pointer value and saves the program counter value in the address stack
register. Then, enters the address specified with the operand addr (a
9
to a
0
) into the program counter.
If a carry is generated when the stack pointer value is incremented (+1), an internal reset takes effect.
RET
<1> Instruction code
<2> Cycle count
<3> Function
:
0 1 0 0 0 1 0 0 1 0
: 1
: PC
ASR
SP
SP – 1
Restores the value saved in the address stack register to the program counter. Then, decrements
(–1) the stack pointer.
If a borrow is generated when the stack pointer value is decremented (–1), an internal reset takes effect.
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