參數(shù)資料
型號： UPD65365
英文描述： CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
中文描述： CMOS門陣列Array.Embedded的包版本2.0 |設計手冊[05/2003]
文件頁數(shù)： 20/64頁
文件大?。?/td> 399K
代理商： UPD65365
20
μ
PD64A, 65
Data Sheet U14380EJ2V0DS00
4.2 Timer Operation
The timer starts (counting down) when a value other than 0 is set for the down counter with a timer operation
instruction. The timer operation instructions for making the timer start operation are shown below:
MOV T0, A
MOV T1, A
MOV T, #data10
MOV T, @R0
The down counter is decremented (–1) in the cycle of 64/f
X
or 128/f
X
Note
. If the value of the down counter becomes
0, the zero detecting circuit generates the timer operation end signal to stop the timer operation. At this time, if
the timer is in HALT mode (HALT #
×
101B) waiting for the timer to stop its operation, the HALT mode is released
and the instruction following the HALT instruction is executed. The output of the timer operation end signal is
continued while the down counter is 0 and the timer is stopped. There is the following relational expression between
the timer’s time and the down counter’s set value.
Timer time = (Set value + 1)
×
64/f
X
(or 128/f
X
Note
)
Note
This becomes 128/f
X
if bit 3 of the control register is set (to 1).
By setting 1 for the flag (t
9
) which enables the timer output, the timer can output its operation status from the
S
1
/LED pin and the REM pin. The REM pin can also output the carrier while the timer is in operation.
Table 4-1. Timer Output (at t
9
= 1)
S
1
/LED Pin
REM Pin
Timer operating
Timer halting
L
H
H (or carrier output
Note
)
L
Note
The carrier output results if bit 2 of the control register 0 is cleared (to 0).
Figure 4-2. Timer Output (when carrier is not output)
Timer value: (set value + 1)
×
64/f
X
(or 128/f
X
)
LED
REM
相關PDF資料
PDF描述
UPD65366 CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65367 CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65368 CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65369 CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65451 CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
相關代理商/技術參數(shù)
參數(shù)描述
UPD65366 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65367 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
UPD65368 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65369 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS-10HD Family Pamphlet | Pamphlet[07/2003]
UPD65370 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Gate Array.Embedded Array Ver.2.0 for Package | Design Manual[05/2003]
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*