參數(shù)資料
型號: UPD6451AGT-301
英文描述: On-Screen Display Circuit
中文描述: 屏幕顯示電路
文件頁數(shù): 19/68頁
文件大小: 301K
代理商: UPD6451AGT-301
19
μ
PD63, 63A, 64
4. TIMER
4.1 Timer Configuration
The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists
of a 9-bit down counter (t
8
to t
0
), a flag (t
9
) permitting the 1-bit timer output, and a zero detecting circuit.
Figure 4-1. Timer Configuration
S
1
/LED
REM
Carrier
synchronous
circuit
Bit 2 of control register 0 (P3)
Carrier signal
Zero detecting circuit
9-bit down counter
t
9
t
8
t
7
t
6
t
5
t
4
t
3
t
2
t
1
t
0
T
T1
Bit 3 of control register 0 (P3)
f
X
/64
f
X
/128
Timer operation end signal
(HALT #
×
101B release
signal)
Count
clock
T0
S
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