參數(shù)資料
型號(hào): UPD6376
廠商: NEC Corp.
英文描述: AUDIO 2-CHANNEL 16-BIT D/A CONVERTER
中文描述: 音頻2通道16位D / A轉(zhuǎn)換器
文件頁(yè)數(shù): 5/20頁(yè)
文件大?。?/td> 140K
代理商: UPD6376
μ
PD6376
5
2. INPUT SIGNAL FORMAT
Input data must be input as 2’s complement, MSB first.
2’s complement is a method of expressing both positive numbers and negative numbers as binary numbers. See
the table below.
2’s Complement
Decimal Number
L.OUT, R.OUT Pin Voltage TYP. (V)
(Reference Values)
Note
(MSB)
(LSB)
0111
1111
1111
1111
+32767
2.6
·
0111
1111
1111
1110
+32766
·
0000
0000
0000
0001
+1
0000
0000
0000
0000
0
1.6
1111
1111
1111
1111
–1
·
1000
0000
0000
0001
–32767
1000
0000
0000
0000
–32768
0.6
Note
When A.V
DD
= 5.0 V
Values differ depending on IC fabrication variations, supply voltage fluctuations, and ambient temperature.
Synchronize the (SI, LSI, RSI) data bit delimitations and the LRCK, WDCK reverse timing to the falling edge of
CLK.
CLK requires the input of 16 clocks between sample data (16 bits). Also, make the time interval for 1 bit the same
as 1 clock cycle.
·
·
·
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