參數(shù)資料
型號(hào): UPD6376
廠商: NEC Corp.
英文描述: AUDIO 2-CHANNEL 16-BIT D/A CONVERTER
中文描述: 音頻2通道16位D / A轉(zhuǎn)換器
文件頁(yè)數(shù): 4/20頁(yè)
文件大小: 140K
代理商: UPD6376
μ
PD6376
4
1. PIN FUNCTIONS
Pin No.
Symbol
Name
I/O
Function
1
4/8 f
S
SEL
Input
When this pin is Low or leaves Open, L-ch data and R-ch
data is input in time-division from Pin 15.
When this pin is High, L-ch data is input from Pin 15, and
R-ch data is input from Pin 14.
(Pulled down in IC with 100-k
resistor)
2
D.GND
Digital GND
––
GND pin of logic block
3
NC
Non Connection
––
Not connected to internal chip
4
D.V
DD
Digital V
DD
––
Power supply pin to logic block
5
A.GND
Analog GND
––
GND pin to analog block
6
R.OUT
R-ch OUTPUT
Output
Right analog signal output pin
7
A.V
DD
Analog V
DD
––
Power supply pin to analog block
8
A.V
DD
Analog V
DD
9
R.REF
R-ch Voltage Reference
––
Reference voltage pin. Normally connected to A. GND
through via capacitor to lower impedance
10
L.REF
L-ch Voltage Reference
11
L.OUT
L-ch OUTPUT
Output
Left analog signal output pin
12
A.GND
Analog GND
––
GND pin of analog block
13
LRCK/WDCK
Left/Right Clock
WORD Clock
Input
When Pin 1 is Low or leaves Open:
Functions as L-R judgment signal input pin.
When Pin 1 is High:
Functions as input data word judgment signal input pin.
14
LRSEL/RSI
Left/Right Selection
R-ch Series Input
Input
When Pin 1 is Low or leaves Open:
Functions as pin to select L-R polarity for LRCK signal.
When LRCK signal is High, set LRSEL pin to Low to input
L-ch data; When LRCK signal is LOW, set LRSEL pin to
High to input L-ch data.
When Pin 1 is High:
Functions as R-ch serial data input pin.
15
SI/LSI
Series Input
L-ch Series Input
Input
When Pin 1 is Low or Open:
Functions as L-ch and R-ch serial data input pin
alternately.
When Pin 1 is High:
Functions as L-ch serial data input pin.
16
CLK
CLOCK
Input
Input pin for read clock of serial input data
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