參數(shù)資料
型號： UPD444012AGY-C10X-MJH
廠商： NEC Corp.
英文描述： 4M-BIT CMOS STATIC RAM 256K-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION
中文描述： 4分位CMOS靜態(tài)RAM 256K字由16位溫度范圍
文件頁數(shù)： 9/24頁
文件大小： 143K
代理商： UPD444012AGY-C10X-MJH
Data Sheet M14464EJ5V0DS
9
μ
PD444012A-X
Read Cycle (1/2) (B version)
Parameter
Symbol
V
CC
≥
3.0 V
μ
PD444012A
μ
PD444012A
μ
PD444012A
μ
PD444012A
μ
PD444012A
-B55X
-B55X
-B70X
V
CC
≥
2.7 V
Unit
Condition
-B85X
-B10X
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
Read cycle time
t
RC
50
55
70
85
100
ns
Address access time
t
AA
50
55
70
85
100
ns
Note 1
/CE1 access time
t
CO1
50
55
70
85
100
ns
CE2 access time
t
CO2
50
55
70
85
100
ns
/OE to output valid
t
OE
30
30
35
40
50
ns
/LB, /UB to output valid
t
BA
50
55
70
85
100
ns
Output hold from address change
t
OH
10
10
10
10
10
ns
/CE1 to output in low impedance
t
LZ1
10
10
10
10
10
ns
Note 2
CE2 to output in low impedance
t
LZ2
10
10
10
10
10
ns
/OE to output in low impedance
t
OLZ
0
0
0
0
0
ns
/LB, /UB to output in low impedance
t
BLZ
10
10
10
10
10
ns
/CE1 to output in high impedance
t
HZ1
20
20
25
30
35
ns
CE2 to output in high impedance
t
HZ2
20
20
25
30
35
ns
/OE to output in high impedance
t
OHZ
20
20
25
30
35
ns
/LB, /UB to output in high impedance
t
BHZ
20
20
25
30
35
ns
Notes 1.
The output load is 1TTL + 50 pF.
2.
The output load is 1TTL + 5 pF.
Read Cycle (2/2) (C version)
Parameter
Symbol
V
CC
≥
2.2 V
Unit
Condition
μ
PD444012A
-C70X
μ
PD444012A
-C85X
μ
PD444012A
-C10X
μ
PD444012A
-C12X
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
MIN.
MAX.
Read cycle time
t
RC
70
85
100
120
ns
Address access time
t
AA
70
85
100
120
ns
Note 1
/CE1 access time
t
CO1
70
85
100
120
ns
CE2 access time
t
CO2
70
85
100
120
ns
/OE to output valid
t
OE
35
40
50
60
ns
/LB, /UB to output valid
t
BA
70
85
100
120
ns
Output hold from address change
t
OH
10
10
10
10
ns
/CE1 to output in low impedance
t
LZ1
10
10
10
10
ns
Note 2
CE2 to output in low impedance
t
LZ2
10
10
10
10
ns
/OE to output in low impedance
t
OLZ
0
0
0
0
ns
/LB, /UB to output in low impedance
t
BLZ
10
10
10
10
ns
/CE1 to output in high impedance
t
HZ1
25
30
35
40
ns
CE2 to output in high impedance
t
HZ2
25
30
35
40
ns
/OE to output in high impedance
t
OHZ
25
30
35
40
ns
/LB, /UB to output in high impedance
t
BHZ
25
30
35
40
ns
Notes 1.
The output load is 1TTL + 30 pF.
2.
The output load is 1TTL + 5 pF.
#
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