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參數(shù)資料
| 型號： | UPD43256BGW-A85-9JL |
| 廠商： | NEC Corp. |
| 英文描述： | 256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT |
| 中文描述： | 256K位CMOS靜態(tài)RAM 32K的詞8位 |
| 文件頁數(shù)： | 15/24頁 |
| 文件大小： | 174K |
| 代理商： | UPD43256BGW-A85-9JL |
15
μ
PD43256B
Low V
CC
Data Retention Characteristics
L Version (
μ
PD43256B-L: T
A
= 0 to 70 C)
Parameter
Symbol
Test conditions
MIN.
TYP.
MAX.
Unit
Data retention supply voltage
V
CCDR
CS
≥
V
CC
– 0.2 V
2.0
5.5
V
Data retention supply current
I
CCDR
V
CC
= 3.0 V, CS
≥
V
CC
– 0.2 V
0.5
20
Note
μ
A
Chip deselection to data
retention mode
t
CDR
0
ns
Operation recovery time
t
R
5
ms
Note
3
μ
A (T
A
≤
40 C)
LL Version (
μ
PD43256B-LL: T
A
= 0 to 70 C)
A Version (
μ
PD43256B-A: T
A
= 0 to 70 C)
B Version (
μ
PD43256B-B: T
A
= 0 to 70 C)
Parameter
Symbol
Test conditions
MIN.
TYP.
MAX.
Unit
Data retention supply voltage
V
CCDR
CS
≥
V
CC
– 0.2 V
2.0
5.5
V
Data retention supply current
I
CCDR
V
CC
= 3.0 V, CS
≥
V
CC
– 0.2 V
0.5
7
Note
μ
A
Chip deselection to data
retention mode
t
CDR
0
ns
Operation recovery time
t
R
5
ms
Note
2
μ
A (T
A
≤
40 C), 1
μ
A (T
A
≤
25 C)
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