參數(shù)資料
型號(hào)： UPD43256BGW-A85-9KL
廠商： NEC Corp.
英文描述： 256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT
中文描述： 256K位CMOS靜態(tài)RAM 32K的詞8位
文件頁(yè)數(shù)： 1/24頁(yè)
文件大小： 174K
代理商： UPD43256BGW-A85-9KL
1990, 1993, 1994
DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD43256B
256K-BIT CMOS STATIC RAM
32K-WORD BY 8-BIT
Description
The
μ
PD43256B is a high speed, low power, and 262, 144 bits (32,768 words by 8 bits) CMOS static RAM.
Battery backup is available (L, LL, A, and B versions). And A and B versions are wide voltage operations.
The
μ
PD43256B is packed in 28-pin plastic DIP, 28-pin plastic SOP and 28-pin plastic TSOP (I).
Features
32,768 words by 8 bits organization
Fast access time: 70, 85, 100, 120, 150 ns (MAX.)
Wide voltage range (A version: V
CC
= 3.0 to 5.5 V, B version: V
CC
= 2.7 to 5.5 V)
2 V data retention
OE input for easy application
Access time
ns (MAX.)
Operating
supply voltage
V
Operating
temperature
°
C
Standby
supply current
μ
A (MAX.)
Data retention
supply current
Note 1
μ
A (MAX.)
Part number
μ
PD43256B-L
70, 85
4.5 to 5.5
0 to 70
50
3
μ
PD43256B-LL
70, 85
15
2
μ
PD43256B-A
85, 100
Note 2
, 120
Note 2
3.0 to 5.5
μ
PD43256B-B
Note 2
100, 120, 150
2.7 to 5.5
Notes 1.
T
A
≤
40 C, V
CC
= 3 V
2.
Access time : 85 ns (MAX.) (V
CC
= 4.5 to 5.5 V)
Version X and P
This data sheet can be applied to the version X and P. Each version is identified with its lot number. Letter X in
the fifth character position in a lot number signifies version X, letter P, version P.
The information in this document is subject to change without notice.
The mark shows major revised points.
Document No. M10770EJ9V0DS00 (9th edition)
Date Published May 1997 N
Printed in Japan
D43256B
JAPAN
Lot number
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD43256BGW-B10X-9JL-A 制造商:Renesas Electronics Corporation 功能描述:SRAM Chip Async Single 3.3V/5V 256K-Bit 32K x 8 100ns 28-Pin TSOP-I
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UPD44164182F5-E50-EQ1 制造商:Renesas Electronics Corporation 功能描述:UPD44164182 Series 18 Mb (1 M x 18 ) 200 MHz 5 ns DDRII SRAM - BGA-165
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