參數(shù)資料
型號(hào): UPD178024GC
廠商: NEC Corp.
元件分類: 8位微控制器
英文描述: 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述: 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁數(shù): 52/98頁
文件大?。?/td> 467K
代理商: UPD178024GC
Data Sheet U14608EJ1V0DS00
52
μ
PD178024GC-051
5. STANDBY FUNCTIONS
The
μ
PD178024GC-051 can perform a standby operation to reduce the power consumption.
In the standby mode, however, none of the functions, except ejecting the disc, can be used.
The mode is switched between the normal operation mode and standby mode by using the ACC pin (pin 69) and
BATT pin (pin 70).
For the switching timing, refer to “12. MUTE OUTPUT TIMING CHART”.
(1) Standby operation
The ACC and BATT pins are tested every 2 ms five times to suppress chattering.
After chattering has been suppressed, the mode is changed from the normal operation mode to the standby
mode when the ACC or BATT pin goes high.
If the ACC or BATT pin is high since power application, the standby mode is selected on completion of
chattering suppression.
In the standby mode, none of the functions, except ejecting the disc, can be used.
In addition, the LCD panel displays nothing.
The clock is not displayed in the standby mode even if the clock function is specified by using the initialization
switch “NOCLK”.
Internally, however, the clock count continues in the same manner as in the normal operation mode.
In the standby mode, the
μ
PD178024GC-051 performs an intermittent operation by oscillating and stopping
the CPU clock to reduce its own current consumption.
If the clock function is not specified, oscillation of the CPU clock and system clock is completely stopped in
the standby mode. Consequently, the current consumption of the
μ
PD178024GC-051 is substantially
reduced.
In the standby mode, each pin is placed in the status that lowers the current consumption.
For the pin statuses at this time, refer to “1. PIN FUNCTIONS”.
(2) Operation after releasing standby mode
If the internal falling edge detector of the
μ
PD178024GC-051 detects negative transition of the ACC pin (pin
69) or BATT pin (pin 70), the standby mode is temporarily released, and the ACC and BATT pins are tested.
If both the ACC and BATT pins are high, the standby mode is immediately resumed.
If either of the pins is low, the standby mode is released, and the normal operation mode is set.
When the standby mode has been released, the previous power status and audio source mode selected
before the standby mode was set are restored.
Similarly, the reception frequency of the radio, the contents of the preset memories, the volume values of the
electronic volume, and other functions are restored to the status before the standby mode was set.
If the contents of the internal memory could not be retained because the supply voltage dropped and if the
result of reading the initialization switches differs from before, all the statuses are returned to the default
statuses in the same manner as on power application.
(3) Ejecting disc in standby mode
If the internal falling edge detector of the
μ
PD178024GC-051 detects the negative transition of the EJECT pin
(pin 71), the standby mode is temporarily released and the disc is ejected in the normal mode.
At this time, eject indication is not made on the display.
As soon as the disc has been ejected, the standby mode is resumed.
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