參數(shù)資料
型號(hào)： UPD17149GTA1
廠商： NEC Corp.
英文描述： SMALL, GENERAL-PURPOSE 4-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 小，通用4位單晶片微控制器
文件頁(yè)數(shù)： 17/102頁(yè)
文件大?。?/td> 408K
代理商： UPD17149GTA1
17
μ
PD17145(A1), 17147(A1), 17149(A1)
2. PROGRAM MEMORY (ROM)
Table 2-1 shows the program memory configuration of the
μ
PD17145(A1), 17147(A1), and 17149(A1).
Table 2-1. Program Memory Configuration
Part Number
Program Memory Capacity
Program Memory Address
μ
PD17145(A1)
2 KB (1024
×
16 bits)
0000H-03FFH
μ
PD17147(A1)
4 KB (2048
×
16 bits)
0000H-07FFH
μ
PD17149(A1)
8 KB (4096
×
16 bits)
0000H-0FFFH
The program memory stores programs and constant data tables.
The program memory is addressed by the program counter.
Addresses 0000H-0005H are allocated to a reset start address and various interrupt vector addresses.
2.1 Configuration of Program Memory
Figure 2-1 shows the program memory map. The program memory is divided in units called “pages” each
of which consists of 2K steps with one step made up of 16 bits.
Addresses 0000H-07FFH (page 0) of the program memory can be specified by the direct subroutine call
instruction. The entire address range of the program memory, 0000H-0FFFH, can be specified by the branch,
indirect subroutine call, and table reference instructions.
Figure 2-1. Program Memory Map
0000H
0001H
0002H
0003H
0004H
0005H
03FFH
07FFH
0FFFH
(With PD17145(A1))
(With PD17147(A1))
(With PD17149(A1))
Address
16 bits
Reset start address
Serial interface interrupt vector
Basic interval timer interrupt vector
Timer 1 interrupt vector
Timer 0 interrupt vector
External (INT) interrupt vector
Page 0
CALL addr
instruction subroutine
entry address
Page 1
BR addr instruction
branch address
BR @AR instruction
branch address
CALL @AR instruction
subroutine entry address
MOVT DBF,
@AR instruction
table reference address
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