參數(shù)資料
型號(hào)： UPD17147CTA1
廠商： NEC Corp.
英文描述： SMALL, GENERAL-PURPOSE 4-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 小，通用4位單晶片微控制器
文件頁數(shù)： 54/102頁
文件大?。?/td> 408K
代理商： UPD17147CTA1
54
μ
PD17145(A1), 17147(A1), 17149(A1)
16. INTERRUPT FUNCTION
The
μ
PD17149(A1) has five interrupt causes, of which four are internal and one is external, enabling various
applications.
The interrupt control circuit of the
μ
PD17149(A1) has the following features and can perform interrupt
processing at extremely high speeds:
(a) Acknowledging an interrupt can be controlled by interrupt mask enable flag (INTE) and interrupt enable
flag (IP
×××
).
(b) Interrupt request flags (IRQ
×××
) can be tested and cleared (occurrence of an interrupt can be checked
by software).
(c) Multiple interrupts of up to 3 levels can be processed.
(d) The standby mode (STOP or HALT) can be released by an interrupt request (releasing condition can be
selected by the interrupt enable flag).
Caution
Only the BCD, CMP, CY, Z, and IXE flags are automatically saved to the stack by
hardware when interrupt processing is performed. Up to three levels of multiple
interrupts can be processed. If the peripheral hardware (timers, A/D converter, etc.)
is accessed during interrupt processing, the contents of DBF and WR are not saved by
the hardware. It is therefore recommended that DBF and WR be saved to the RAM by
software at the beginning of interrupt processing, and that their contents be restored
immediately before the interrupt processing.
16.1 Types of Interrupt Causes and Vector Addresses
All the interrupts of the
μ
PD17149 (A1) are vectored interrupts, and therefore, program execution branches
to a vector address corresponding to the interrupt cause when an interrupt has been acknowledged. Table 16-
1 shows the types of interrupt causes and vector addresses.
If two or more interrupts occur at the same time, or if two or more pending interrupts are enabled all at once,
processing is performed according to the priority shown in Table 16-1.
Table 16-1. Types of Interrupt Causes
Vector
Address
Internal
/External
Interrupt Cause
Priority
IRQ Flag
IP Flag
IEG Flag
Remark
INT pin
(RF: 0FH, bit 0)
1
0005H
IRQ
RF: 3FH,
bit 0
IP
RF: 2FH,
bit 0
IEGMD0, 1
RF:1FH
External
Rising, falling, or
both rising and fall-
ing edges selectable
Timer 0
2
0004H
IRQTM0
RF: 3EH,
bit 0
IPTM0
RF: 2FH,
bit 1
Internal
—
Timer 1
3
0003H
IRQTM1
RF: 3DH,
bit 0
IPTM1
RF: 2FH,
bit 2
Internal
—
Basic interval
timer
4
0002H
IRQBTM
RF: 3CH,
bit 0
IPBTM
RF: 2FH,
bit 3
—
Internal
Serial interface
5
0001H
IRQSIO
RF: 3BH,
bit 0
IPSIO
RF: 2EH,
bit 0
Internal
—
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