參數(shù)資料
型號: UPD16681W-011
廠商: NEC Corp.
英文描述: LCD CONTROLLER/DRIVER FOR DOT MATRIX DISPLAY OF JIS LEVEL 1 AND JIS LEVEL 2 KANJI SETS
中文描述: LCD控制器/的點(diǎn)陣顯示為JIS 1級和日標(biāo)平驅(qū)動2漢字集
文件頁數(shù): 6/56頁
文件大小: 906K
代理商: UPD16681W-011
Data Sheet S13104EJ5V0DS00
6
μ
PD16681
3.2 Logic System Pins
Pin Symbol
Pin Name
Pad No.
I/O
Description
WS
Select word length
76
I
Use this pin to select the word length. An 8-bit parallel interface is used
for high level and a serial interface is used for low level. This setting
cannot be changed after the power has been switched on.
DA
CHA
Select D/A converter
61
I
Use this pin to select whether or not to use the D/A converter for
regulating the LCD driver voltage. Select high level to use the D/A
converter or low level to not use it.
STB
Strobe
77
I
This is used for the device’s select signal and strobe signal for
communication. Communication is initialized at the rising edge or falling
edge of STB.
Command data receive standby status occurs at the falling edge of STB.
Communication is enabled when STB is low.
Also, enabled status or the shift clock is ignored when STB is high.
E/SCK
Enable/shift clock
78
I
This is an input enable pin for data when the parallel interface is used.
During the read-in operation, data is captured in the interface buffer at
the signal’s rising edge. During a read-out operation, data is read-out
from the interface buffer at the signal’s falling edge.
When using a serial interface, this pin is used for the data shift clock.
During the read-in operation, data is captured in the shift register at the
signal’s rising edge. During a read-out operation, data is read from the
shift register at the signal’s falling edge.
D
0
/DATA
Data bus/data
68
I/O
This pin is used for data bus bit D
0
when using the parallel interface.
When using the serial interface, it is an I/O pin (tri-state) for commands
and display data.
D
1
-D
7
Data bus
69-75
I/O
These pins are used for data bus bits D
1
to D
7
when using the parallel
interface.
It should be fixed high or low when using the serial interface.
TEST
OUT
Test output
80
O
This is a test output pin. Leave this pin open when using the device.
/RESET
Reset
79
I
This pin is used for internal resets at low-level.
AMP
CHA
Op amp switch for
LCD driver’s power
supply level
62
I
This pin is used to control the op amp that works with the LCD driver’s
power supply level. High-power mode is set when at low level and
normal mode is set when at high level.
V
EXT
Reference power
supply switch
60
I
This pin is used to select the reference power supply circuit’s supply
mode. High level sets external mode and low level sets internal mode.
SEG
INV
Segment direction
switch
63
I
This pin is used to control the segment output direction. Low level sets
forward direction and high level sets reverse direction.
COM
INV
Common scan
direction switch
64
I
This pin is used to switch the common scan direction. Low level sets
forward direction and high level sets reverse direction.
OSC
IN
Oscillator pins
65
I
These pins are connected to a 100-k
resistance. When using an
OSC
OUT
66
O
external oscillator, input to OSC
IN
and leave OSC
OUT
unconnected.
OSC
BRI
External clock for
blink function
67
I
This is an input pin for the 2-Hz external clock. Internally, it is divided by
half to generate a 1-Hz signal that is used as the synchronization signal
for the blink function.
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