參數(shù)資料
型號(hào): UPA835
廠商: NEC Corp.
英文描述: NPN SILICON EPITAXIAL TRANSISTOR WITH 2 DIFFERENT ELEMENTS IN A FLAT-LEAD 6-PIN THIN-TYPE ULTRA SUPER MINIMOLD PACKAGE
中文描述: NPN硅外延晶體管2不同元素在一個(gè)平面,鉛6引腳薄型包裝超超MINIMOLD
文件頁(yè)數(shù): 3/12頁(yè)
文件大?。?/td> 71K
代理商: UPA835
Data Sheet P14555EJ1V0DS00
3
μ
PA835TC
(2) Q2
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Collector Cutoff Current
I
CBO
V
CB
= 10 V, I
E
= 0
1.0
μ
A
Emitter Cutoff Current
I
EBO
V
EB
= 1 V, I
C
= 0
1.0
μ
A
DC Current Gain
h
FE
V
CE
= 3 V, I
C
= 7 mA
Note 1
70
140
Gain Bandwidth Product
f
T
V
CE
= 3 V, I
C
= 7 mA, f = 1 GHz
3.0
4.5
GHz
Feedback Capacitance
C
re
V
CB
= 3 V, I
E
= 0, f = 1 MHz
Note 2
0.7
1.5
pF
Insertion Power Gain
|
S
21e
|
2
V
CE
= 3 V, I
C
= 7 mA, f = 1 GHz
7.0
9.0
dB
Noise Figure
NF
V
CE
= 3 V, I
C
= 7 mA, f = 1 GHz
1.2
2.5
dB
Notes 1.
Pulse Measurement: PW
350
μ
s, Duty Cycle
2%
2.
Collector to base capacitance when measured with capacitance meter (automatic balanced bridge
method), with emitter connected to guard pin of capacitance meter.
h
FE
CLASSIFICATION
Rank
FB
Marking
37
h
FE
Value of Q1
75 to 150
h
FE
Value of Q2
70 to 140
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