參數(shù)資料
型號(hào): UMC3
廠商: ON SEMICONDUCTOR
英文描述: Dual Common Base-Collector Bias Resistor Transistors
中文描述: 雙通用基礎(chǔ)集電極偏置電阻晶體管
文件頁數(shù): 1/10頁
文件大小: 87K
代理商: UMC3
Semiconductor Components Industries, LLC, 2004
September, 2004 Rev. 5
1
Publication Order Number:
UMC2NT1/D
UMC2NT1, UMC3NT1,
UMC5NT1
Preferred Devices
Dual Common
BaseCollector Bias
Resistor Transistors
NPN and PNP Silicon Surface Mount
Transistors with Monolithic Bias
Resistor Network
The Bias Resistor Transistor (BRT) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a baseemitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the UMC2NT1 series, two
complementary BRT devices are housed in the SOT353 package
which is ideal for low power surface mount applications where board
space is at a premium.
Features
PbFree Packages are Available
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
Available in 8 mm, 7 inch/3000 Unit Tape and Reel
MAXIMUM RATINGS
(T
A
= 25
°
C unless otherwise noted, common for Q
1
and Q
2
, minus sign for Q
1
(PNP) omitted)
Rating
Symbol
Value
Unit
Collector-Base Voltage
V
CBO
50
Vdc
Collector-Emitter Voltage
V
CEO
50
Vdc
Collector Current
I
C
100
mAdc
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits
are exceeded, device functional operation is not implied, damage may occur
and reliability may be affected.
THERMAL CHARACTERISTICS
Thermal Resistance Junction-to-Ambient
(surface mounted)
R
θ
JA
833
°
C/W
Operating and Storage Temperature Range
T
J
, T
stg
65 to
+150
°
C
Total Package Dissipation
@ T
A
= 25
°
C (Note 1)
P
D
*
150
mW
1. Device mounted on a FR-4 glass epoxy printed circuit board using the
minimum recommended footprint.
SC88A/SOT353
CASE 419A
STYLE 6
Ux = Device Marking
x
= 2, 3 or 5
d
= Date Code
Ux
MARKING
DIAGRAM
1
3
2
5
4
Preferred
devices are recommended choices for future use
and best overall value.
4
5
Q1
Q2
R1
R1
R2
R2
3
1
2
d
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
相關(guān)PDF資料
PDF描述
UMC5 Dual Common Base-Collector Bias Resistor Transistors
UMC5NT1 Dual Common Base-Collector Bias Resistor Transistors
UMC2NT1G Dual Common Base-Collector Bias Resistor Transistors
UMC3NT1G Dual Common Base-Collector Bias Resistor Transistors
UMC3NT1 Dual Common Base Collector Bias Resistor Transistors(偏置電阻晶體管)
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