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參數(shù)資料
| 型號(hào)： | UMA1018M |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Low-voltage dual frequency synthesizer for radio telephones |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1250 MHz, PDSO20 |
| 文件頁(yè)數(shù)： | 4/20頁(yè) |
| 文件大?。?/td> | 166K |
| 代理商： | UMA1018M |
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1995 Jun 27
4
Philips Semiconductors
Product specification
Low-voltage dual frequency
synthesizer for radio telephones
UMA1018M
PINNING
SYMBOL
PIN
DESCRIPTION
FAST
1
control input to speed-up main
synthesizer
principal synthesizer speed-up
charge-pump output
principal synthesizer normal
charge-pump output
digital power supply 1
digital power supply 2
1 GHz principal synthesizer
frequency input
digital ground
common crystal frequency input from
TCXO
principal synthesizer power-on input
7-bit digital-to-analog output
Programming bus clock input
programming bus data input
programming bus enable input
(active LOW)
regulator pin to set the charge-pump
currents
auxiliary synthesizer frequency input
analog ground
auxiliary synthesizer charge-pump
output
supply for charge-pump and DAC
circuits
auxiliary synthesizer power-on input
in-lock detect output (main PLL);
test mode output
CPPF
2
CPP
3
V
DD1
V
DD2
PRI
4
5
6
DGND
f
XTAL
7
8
PON
DOUT
CLK
DATA
E
9
10
11
12
13
I
SET
14
AUX
AGND
CPA
15
16
17
V
CC
18
AON
LOCK
19
20
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
Principal synthesizer
Programmable reference and main dividers drive the
principal PLL phase detector. Two charge pumps produce
phase error current pulses for integration in an external
loop filter. A hardwired power-down input PON (pin 9)
ensures that the dividers and phase comparator circuits
can be disabled.
The PRI input (pin 6) drives a pre-amplifier to provide the
clock to the first divider stage. The pre-amplifier has a high
input impedance, dominated by pin and pad capacitance.
The circuit operates with signal levels from 50 mV up to
225 mV (RMS), and at frequencies as high as 1.25 GHz.
The high frequency divider circuits use bipolar transistors,
slower bits are CMOS. Divider ratios (512 to 131071)
allow a 1 MHz phase comparison with a 500 MHz RF
input, and a 10 kHz phase comparison with a 1.25 GHz RF
input.
The reference and main divider outputs are connected to
a phase/frequency detector that controls two charge
pumps. The two pumps have a common bias-setting
current that is set by an external resistance. The ratio
between currents in fast and normal operating modes can
be programmed via the 3-wire serial bus. The low current
pump remains active except in power-down.
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| UMA1019AM | Low-voltage frequency synthesizer for radio telephones |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UMA1018M/C3 | 制造商:NXP Semiconductors 功能描述: |
| UMA1019AM | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-voltage frequency synthesizer for radio telephones |
| UMA1019M | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-voltage frequency synthesizer for radio telephones |
| UMA1020 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-voltage dual frequency synthesizer for radio telephones |
| UMA1020AM | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Low-voltage dual frequency synthesizer for radio telephones |
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