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參數(shù)資料
| 型號(hào)： | UMA1015AM |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Low-power dual frequency synthesizer for radio communications |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1100 MHz, PDSO20 |
| 文件頁(yè)數(shù)： | 10/24頁(yè) |
| 文件大?。?/td> | 159K |
| 代理商： | UMA1015AM |
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1997 Sep 03
10
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer
for radio communications
UMA1015AM
SERIAL TIMING CHARACTERISTICS
V
DD1
= 3 V; T
amb
= 25
°
C; unless otherwise specified.
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Serial programming clock; CLK
t
r
, t
f
T
cy
input rise and fall times
clock period
100
10
40
ns
ns
Enable programming; E
t
START
t
END
t
W
t
SU;E
delay to rising clock edge
delay from last falling clock edge
minimum inactive pulse width
enable set-up time to next clock edge
40
20
4000
20
ns
ns
ns
ns
Register serial input data; DATA
t
SU;DAT
t
HD;DAT
input data to clock set-up time
input data to clock hold time
20
20
ns
ns
Fig.3 Serial bus timing diagram.
handbook, full pagewidth
MGG524
tSU;DAT
tHD;DAT
Tcy
tf
tr
tEND
tSU;E
MSB
LSB
ADDRESS
tSTART
tW
CLK
DATA
E
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