參數(shù)資料
型號(hào)： UDA1331H
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： Universal Serial Bus USB Audio Playback Peripheral APP
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 14 X 20 MM, 2.80 MM HEIGHT, PLASTIC, SOT-319-2, QFP-64
文件頁(yè)數(shù)： 8/40頁(yè)
文件大?。?/td> 181K
代理商： UDA1331H
1998 Oct 06
8
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Peripheral (APP)
UDA1331H
FUNCTIONAL DESCRIPTION
All bold-faced parameters given in this data sheet
such as ‘bAlternateSetting’ are part of the USB
specification as described in “USB Device Class
Definition for Audio Devices”
The Universal Serial Bus (USB)
Data and power are transferred via the USB by a 4-wire
cable. The signalling occurs via two wires and
point-to-point segments. The signals on each segment are
differentially driven into a cable of 90
intrinsic
impedance. The differential receiver features input
sensitivity of at least 200 mV and sufficient common mode
rejection.
The analog front-end
The analog front-end is an on-chip generic USB
transceiver. It is designed to allow voltage levels up to V
DD
from standard or programmable logic to interface with the
physical layer of the USB. It is capable of receiving and
transmitting serial data at full speed (12 Mbits/s).
The USB processor
The USB processor forms the interface between the
analog front-end, the ADAC and the microcontroller.
The USB processor consists of:
The Philips Serial Interface Engine (PSIE)
The Memory Management Unit (MMU)
The Audio Sample Redistribution (ASR) module.
T
HE
P
HILIPS
S
ERIAL
I
NTERFACE
E
NGINE AND
M
EMORY
M
ANAGEMENT
U
NIT
(PSIE
AND
MMU)
The PSIE and MMU translate the electrical USB signals
into bytes and signals. Depending upon the USB device
address and the USB endpoint address, the USB data is
directed to the correct endpoint buffer on the PSIE and
MMU interface. The data transfer could be of the bulk,
isochronous, control or interrupt type. The USB device
address is configured during the enumeration process.
The UDA1331H has three endpoints. These are:
Control endpoint 0
Status interrupt endpoint
Isochronous data sink endpoint.
The amount of bytes per packet on the control endpoint is
limited by the PSIE and MMU hardware to 8 bytes per
packet.
The PSIE is the digital front-end of the USB processor.
This module recovers the 12 MHz USB clock, detects the
USB sync word and handles all low-level USB protocols
and error checking.
The MMU is the digital back-end of the USB processor.
It handles the temporary data storage of all USB packets
that are received or sent over the bus. Three types of
packets are defined on the USB. These are:
Token packets
Data packets
Handshake packets.
The token packet contains information about the
destination of the data packet. The audio data is
transferred via an isochronous data sink endpoint and
consequently no handshaking mechanism is used.
The MMU also generates a 1 kHz clock that is locked to
the USB Start-Of-Frame (SOF) token.
T
HE
A
UDIO
S
AMPLE
R
EDISTRIBUTION
(ASR)
MODULE
The ASR module reads the audio samples from the MMU
and distributes these samples equidistant over a 1 ms
frame period. The distributed audio samples are translated
by the digital I/O module to standard I
2
S-bus format or
Japanese digital I/O format. The ASR module generates
the bit clock and the word select signal of the digital I/O.
The digital I/O formats the received audio samples to one
of the four specified serial digital audio formats
(standard I
2
S-bus, 16, 18 or 20 bits LSB-justified).
The microcontroller
The microcontroller receives the control information
selected from the USB by the USB processor. It handles
the high-level USB protocols and the user interfaces.
The major task of the software process, that is mapped
upon the microcontroller, is to control the different modules
of the UDA1331H in such a way that it behaves as a USB
device. Therefore the microcontroller:
Interprets the USB requests and maps them upon the
UDA1331H application
Controls the internal operation of the UDA1331H and
the digital I/O pins
Communicates with the external world (EEPROM) using
the I
2
C-bus facility and the general purpose I/O pins.
The firmware must be located in an external (E)PROM.
The UDA1331H will be delivered with standard USB
compliant firmware.
相關(guān)PDF資料
PDF描述
UDA1334BT Low power audio DAC
UDA1334TS Low power audio DAC
UDA1335H Universal Serial Bus USB Audio Playback Recording Peripheral APRP
UDA1340 Low-voltage low-power stereo audio CODEC with DSP features
UDA1340M Low-voltage low-power stereo audio CODEC with DSP features
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UDA1334ATS 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Low power audio DAC with PLL
UDA1334ATS/N2 制造商:NXP Semiconductors 功能描述:IC DAC AUDIO LP 16-SSOP 制造商:NXP Semiconductors 功能描述:IC, DAC, AUDIO, LP, 16-SSOP
UDA1334ATS/N2,112 功能描述:數(shù)模轉(zhuǎn)換器- DAC AUDIO DAC LP RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
UDA1334ATS/N2,118 功能描述:數(shù)模轉(zhuǎn)換器- DAC ULTRA LOW COST DAC RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
UDA1334ATSDH 功能描述:數(shù)模轉(zhuǎn)換器- DAC AUDIO DAC LP RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換器數(shù)量:1 DAC 輸出端數(shù)量:1 轉(zhuǎn)換速率:2 MSPs 分辨率:16 bit 接口類(lèi)型:QSPI, SPI, Serial (3-Wire, Microwire) 穩(wěn)定時(shí)間:1 us 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:SOIC-14 封裝:Tube
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*