參數(shù)資料
型號(hào)： UDA1331H
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Universal Serial Bus USB Audio Playback Peripheral APP
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 14 X 20 MM, 2.80 MM HEIGHT, PLASTIC, SOT-319-2, QFP-64
文件頁數(shù)： 30/40頁
文件大?。?/td> 181K
代理商： UDA1331H
1998 Oct 06
30
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) Audio
Playback Peripheral (APP)
UDA1331H
SDA and SCL lines (standard I
2
C-bus);
see Fig.5
f
SCL
t
BUF
SCL clock frequency
bus free time between a STOP
and START condition
hold time (repeated) START
condition
SCL LOW time
SCL HIGH time
set-up time for a repeated START
condition
set-up time for a STOP condition
data hold time
data set-up time
rise time of both SDA and SCL
signals
fall time of both SDA and SCL
signals
load capacitance for each bus line
0
4.7
100
kHz
μ
s
t
HD;STA
4.0
μ
s
t
LOW
t
HIGH
t
SU;STA
4.7
4.0
4.7
μ
s
μ
s
μ
s
t
SU;STO
t
HD;DAT
t
SU;DAT
t
r
4.0
5.0
250
0.9
1000
μ
s
μ
s
ns
ns
t
f
300
ns
C
L(bus)
400
pF
Oscillator;
note 1
f
osc
δ
g
m
R
o
C
i(XTAL1)
C
i(XTAL2)
I
start
oscillator frequency
duty factor
transconductance
output resistance
parasitic input capacitance at XTAL1
parasitic input capacitance at XTAL2
start current
13.5
450
10
4.5
4.3
48
50
23.0
700
11
5.0
8.8
30.5
1450
12
5.5
15.0
MHz
%
mS
pF
pF
mA
Power-on reset
t
su(POR)
power-on reset set-up time
notes 2 and 3
5C
ref
ms
Filter Stream DAC (FSDAC)
RES
V
o(FS)(rms)
resolution
full-scale output voltage
(RMS value)
supply voltage ripple rejection of
V
DDA
and V
DDO
channel unbalance
crosstalk between channels
16
0.66
bits
V
V
DD
= 3.3 V
SVRR
f
ripple
= 1 kHz;
V
ripple(p-p)
= 0.1 V
maximum volume
R
L
= 5 k
60
dB
V
o
α
ct
0.03
95
dB
dB
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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