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參數(shù)資料
| 型號(hào)： | UDA1325PS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | Universal Serial Bus USB CODEC |
| 中文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PDIP42 |
| 封裝： | 0.600 INCH, PLASTIC, SDIP-42 |
| 文件頁(yè)數(shù)： | 25/52頁(yè) |
| 文件大小： | 310K |
| 代理商： | UDA1325PS |
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1999 May 10
25
Philips Semiconductors
Preliminary specification
Universal Serial Bus (USB) CODEC
UDA1325
Internal registers
Table 17
PGA gain registers
Table 18
ADIF control registers
ADDRESS
REGISTER
COMMENTS
BIT
VALUE
0800h
PGA gain register
reserved
PGA input selection
PGA gain right channel
7
6
X
0 (do not change it)
5, 4 and 3 000 =
3 dB
001 = 0 dB
010 = 3 dB
011 = 9 dB
100 = 15 dB
101 = 21 dB
110 = 27 dB
111 = 27 dB
2, 1 and 0 000 =
3 dB
001 = 0 dB
010 = 3 dB
011 = 9 dB
100 = 15 dB
101 = 21 dB
110 = 27 dB
111 = 27 dB
PGA gain left channel
ADDRESS
REGISTER
COMMENTS
BIT
VALUE
0801h
ADIF control register
reserved
number of bits per audio sample
to be transmitted to the host
7
X
00 = reserved
01 = 8 bits audio samples
10 = 16 bits audio samples
11 = 24 bits audio samples
0 = mono
1 = stereo
0 = digital serial audio input
1 = analog input
0 = high-pass filter off
1 = high-pass filter on
00 = I
2
S-bus
01 = 16-bit LSB justified
10 = 18-bit LSB justified
11 = 20-bit LSB justified
6 and 5
mono/stereo selection
4
selection audio input recording
channel
3
selection high-pass filter of
ADIF (DC-filter)
2
I
2
S-bus input serial input format
recording channel
1 and 0
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