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參數(shù)資料
| 型號： | UDA1309H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬信號調理 |
| 英文描述： | Low-power stereo bitstream ADC/DAC(低功耗立體聲位流ADC/DAC) |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 150K |
| 代理商： | UDA1309H |
1998 Jan 06
5
Philips Semiconductors
Product specification
Low-power stereo bitstream ADC/DAC
UDA1309H
PINNING
SYMBOL
PIN
DESCRIPTION
ADBCK
ADWS
MODE0
ADENB
OVLOAD
ADPON
V
SSA(AD)
V
DDA(AD)
V
ref(neg)
V
ref
V
ref(pos)
BAOL
BAIL
BAIR
BAOR
AD
ref
I
ref
DA
ref
V
DDO
V
SSO
V
OL
DACL
DACR
V
OR
V
DDA(DA)
V
SSA(DA)
V
SSD
V
DDD
DAPON
DADEM
DABCK
DAWS
V
SSD(F)
V
DDD(F)
DASDA
ANLPTR
TEST0
TEST1
V
SS(I/O)
SYSCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
ADC input bit clock; 32f
s
or 64f
s
ADC word select input at f
s
ADC/DAC mode select input
ADC serial data enable input (active HIGH)
ADC output overload flag (active LOW)
ADC power-on-mode input (active HIGH)
ADC analog ground supply voltage
ADC analog supply voltage
ADC negative reference voltage input (ground)
ADC decoupling capacitor
ADC positive reference voltage decoupling capacitor
ADC input amplifier output left
ADC input amplifier virtual ground left
ADC input amplifier virtual ground right
ADC input amplifier output right
ADC decoupling capacitor
ADC/DAC reference current resistor input
DAC decoupling capacitor
ADC/DAC operational amplifier supply voltage
ADC/DAC operational amplifier ground supply voltage
DAC output voltage left
DAC output current left
DAC output current right
DAC output voltage right
DAC analog supply voltage
DAC analog ground supply voltage
ADC/DAC digital ground supply voltage
ADC/DAC digital supply voltage
DAC power-on-mode input (active HIGH)
DAC digital de-emphasis input (active HIGH)
DAC input bit clock; 32f
s
, 48f
s
or 64f
s
DAC word select input at f
s
ADC/DAC digital filters ground supply voltage
ADC/DAC digital filters supply voltage
DAC serial data input
ADC/DAC analog loop-through input (active HIGH)
ADC/DAC enable test mode 0 input (LOW is normal mode)
ADC/DAC enable test mode 1 input (LOW is normal mode)
ADC/DAC digital input/output ground supply voltage
ADC/DAC system clock input (f
sys
= 256f
s
; DAC also 192f
s
and 384f
s
)
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