參數(shù)資料
型號: UCB1400BE
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: Audio codec with touch screen controller and power management monitor
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 X 1.40 MM, PLASTIC, LQFP-48
文件頁數(shù): 30/63頁
文件大?。?/td> 674K
代理商: UCB1400BE
Philips Semiconductors
UCB1400
Audio codec with touch screen controller
and power management monitor
Product data
Rev. 02 — 21 June 2002
30 of 63
9397 750 09611
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
11. 10-bit ADC
The UCB1400 includes a 10-bit successive approximation analog-to-digital converter
(ADC) with built-in track-and-hold circuitry, and an analog multiplexer to select one of
the four analog inputs (AD0-3), the four touch screen inputs (TSPX, TSMX, TSPY,
TSMY) or the current of the touch screen bias circuit. The analog multiplexer contains
four resistive dividers to attenuate the high voltages on the AD0-3 inputs to the ADC
input range.
The ADC is controlled through the AC ’97 interface, but the UCB1400 contains
internal logic to ease the control of the ADC and to minimize the number of AC ’97
frame read/write actions.
The ADC is activated by the AE bit in the ADC Control register (0x66). The ADC
circuitry, including the track and hold circuitry does not consume any power as long
as this bit is reset. The analog input multiplexer is controlled by the AI[2:0] bits and
the ADC is actually started with the AS bit in the ADC Control register (0x66).
A complete ADC control sequence consists of several phases. First the ADC has to
be enabled; secondly, the input selector must be set to the proper input; thirdly, the
ADC conversion has to be started; and finally, the ADC result has to be read from the
ADC Data register (0x68).
The UCB1400 has two different modes to start the ADC conversion, which are
selected by the ASE bit in the ADC Control register (0x66). When ASE is ‘0’, the ADC
conversion is started directly by writing a ‘1’ in the AS bit. If the AVE bit in the
Feature/Control Status Register 2 (0x6C) is set to ‘1’, additional filtering is applied to
the ADC data, making it more immune to high frequency fluctuations in a noisy
environment.
Fig 22. Block diagram of the 10-bit ADC circuit.
INPUT
MUX
AD0
AD1
AD2
AD3
TSPX
TSMX
TSPY
TSMY
BIAS CURRENT
INTERNAL REFERENCE
TRACK AND HOLD
AE
10-BIT ADC
ADC
START/STOP
LOGIC
CLOCK
ADCSYNC
AS
AI[2:0]
TM[1:0]
AD[9:0]
SN00240
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