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參數(shù)資料
| 型號： | UC2715N |
| 英文描述： | SINGLE CHANNEL HIGH SIDE SOLID STATE RELAY |
| 中文描述： | 雙外圍驅動器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 300K |
| 代理商： | UC2715N |
4
UC1714/5
UC2714/5
UC3714/5
INPUT:
The input switches at TTL logic levels (approxi-
mately 1.4V) but the allowable range is from 0V to 20V,
allowing direct connection to most common IC PWM con-
troller outputs. The rising edge immediately switches the
AUX output, and initiates a timing delay, T1, before
switching on the PWR output. Similarly, the INPUT falling
edge immediately turns off the PWR output and initiates
a timing delay, T2, before switching the AUX output.
It should be noted that if the input signal comes from a
controller with FET drive capability, this signal provides
another option. INPUT and PWR provide a delay only at
the leading edge while INPUT and AUX provide the delay
at the trailing edge.
PWR:
The PWR output waits for the T1 delay after the
INPUT’s rising edge before switching on, but switches off
immediately at INPUT’s falling edge (neglecting propaga-
tion delays). This output is capable of sourcing 1A and
sinking 2A of peak gate drive current. PWR output in-
cludes a passive, self-biased circuit which holds this pin
active low, when ENBL
≥
0.8V regardless of VCC’s volt-
age.
T1:
A resistor to ground programs the time delay be-
tween AUX switch turn-off and PWR turn-on.
T2:
This pin functions in the same way as T1 but controls
the time delay between PWR turn-off and activation of
the AUX switch.
T1, T2:
The resistor on each of these pins sets the
charging current on internal timing capacitors to provide
independent time control. The nominal voltage level at
each pin is 3V and the current is internally limited to
1mA. The total delay from INPUT to each output includes
a propagation delay in addition to the programmable
timer but since the propagation delays are approximately
equal, the relative time delay between the two outputs
can be assumed to be solely a function of the pro-
grammed delays. The relationship of the time delay vs.
RT is shown in the Typical Characteristics curves.
Either or both pins can alternatively be used for voltage
sensing in lieu of delay programming. This is done by
pulling the timer pins below their nominal voltage level
which immediately activates the timer output.
VCC:
The V
CC
input range is from 7V to 20V. This pin
should be bypassed with a capacitor to GND consistent
with peak load current demands.
PIN DESCRIPTIONS (cont.)
PROPAGATION
DELAYS
INPUT
PWR OUTPUT
T1 DELAY
T2 DELAY
UC1714 AUX OUTPUT
UC1715 AUX OUTPUT
TYPICAL CHARACTERISTICS
Time relationships. (Notes 3, 4)
UDG-99027
0
100
200
300
400
500
0
10
20
30
40
50
60
70
80
90
100
RT (kW)
D
T1 vs RT1
T2 vs RT2
T1 Delay, T2 Delay vs. R
T
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