參數(shù)資料
型號: UC1608xFAC
廠商: Electronic Theatre Controls, Inc.
英文描述: 128COM x 240SEG Matrix LCD Controller-Driver
中文描述: 128COM x 240SEG矩陣LCD控制器驅(qū)動(dòng)器
文件頁數(shù): 27/42頁
文件大?。?/td> 996K
代理商: UC1608XFAC
U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
1999-2002
24
Revision 0.52
P
OWER
-U
P
S
EQUENCE
UC1608 power-up sequence is simplified by built-in
“Power Ready” flags and the automatic invocation
of
System-Reset
command after
Power-ON-Reset
.
System programmers are only required to wait 15~
20 ms before the CPU starting to issue commands
to UC1608. No additional time sequences are
required between enabling the charge pump,
turning on the display drivers, writing to RAM or
any other commands.
P
OWER
-D
OWN
S
EQUENCE
To prevent the charge stored in capacitors C
BX+
,
C
BX–
, and C
L
from damaging the LCD when V
DD
is
switched off, use Reset mode to enable the built-in
draining circuit and discharge these capacitors.
The draining resistor is 1K Ohm for both V
LCD
and
V
B+
. It is recommended to wait
3
x
RC
for V
LCD
and
1.5 x RC
for V
B+
. For example, if C
L
is 10nF, then
the draining time required for V
LCD
is 1~2mS.
When internal V
LCD
is not used, UC1608 will
NOT
drain V
LCD
during RESET. System designers need
to make sure external V
LCD
source is properly
drained off before turning off V
DD
.
Turn on VDD
Set LCD Bias Ratio (BR)
Set Gain (GN)
Set Potential Meter (PM)
Set Display Enable
Wait 15~20 mS
Figure 12:
Reference Power-Up Sequence
Turn off VDD
Reset command
Wait 1~2 mS
Figure 13:
Reference Power-Down Sequence
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