參數(shù)資料
型號(hào)： UC1606
廠商： Electronic Theatre Controls, Inc.
英文描述： 65COM x 132SEG Matrix LCD Controller-Driver
中文描述： 65COM x 132SEG矩陣LCD控制器驅(qū)動(dòng)器
文件頁(yè)數(shù)： 36/46頁(yè)
文件大?。?/td> 895K
代理商： UC1606
U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
1999~2003
34
Product Specifications
Figure 13:
Parallel Bus Timing Characteristics (for 6800 MCU)
(VDD=2.4V to 3.0V, Ta= –30 to +85
o
C)
Symbol
t
AS68
t
AH68
t
CY68
t
PWR68
t
PWW68
t
LPW68
t
DS68
t
DH68
t
ACC68
t
OD68
T
CSSA68
T
CSSD68
T
CSH68
Signal
CD
Description
Condition
Min.
25
50
300
85
85
85
40
15
–
10
15
15
30
Max.
–
Units
ns
Address setup time
Address hold time
System cycle time
Pulse width (read)
Pulse width (write)
Low pulse width
Data setup time
Data hold time
Read access time
Output disable time
–
–
–
–
–
ns
ns
ns
ns
ns
WR1
D0~D7
C
L
= 100pF
140
100
ns
CS1/CS0
Chip select setup time
ns
(VDD=3.0V to 4.0V, Ta= –30 to +85
o
C)
Symbol
t
AS68
t
AH68
t
CY68
t
PWR68
t
PWW68
t
LPW68
t
DS68
t
DH68
t
ACC68
t
OD68
T
CSSA68
T
CSSD68
T
CSH68
Signal
CD
Description
Condition
Min.
20
45
166
65
65
65
30
10
–
10
10
10
20
Max.
–
Units
ns
Address setup time
Address hold time
System cycle time
Pulse width (read)
Pulse width (write)
Low pulse width
Data setup time
Data hold time
Read access time
Output disable time
–
–
–
–
–
ns
ns
ns
ns
ns
WR1
D0~D7
C
L
= 100pF
70
50
ns
CS1/CS0
Chip select setup time
ns
CD
CS0
CS1
WR1
t
AS68
t
AH68
t
CSSA68
t
CY68
t
CSH68
t
CSSD68
t
PWR68
, t
PWW68
t
LPW68
Write
D[7:0]
Read
D[7:0]
t
DS68
t
DH68
t
ACC68
t
OD68
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