
U
LTRA
C
HIP
High-Voltage Mixed-Signal IC
1999-2003
10
Product Specifications
C
OMMAND DESCRIPTION
(1) Write data to display memory
Action
Write data
C/D W/R D7
1
0
D6
D5
D4
D3
D2
D1 D0
8bits data write to SRAM
(2) Read data to display memory
Action
Read data
C/D W/R D7
1
1
D6
D5
D4
D3
D2
D1 D0
8bits data from SRAM
Write/Read Data Byte (command 1,2 ) operation accesses display buffer RAM based on Page Address (PA)
register and Column Address (CA) register. To minimize bus interface cycles, PA and CA will be increased
or decreased automatically depending on the setting of Access Control (AC) registers. PA and CA can also
be programmed directly by issuing
Set Page Address
and
Set Column Address
commands.
If Wrap-Around (WA) is OFF (AC[0] = 0), CA will stop increasing after reaching the end of page (MC), and
system programmers need to set the values of PA and CA explicitly. If WA is ON (AC[0]=1), when CA
reaches end of page, CA will be reset to 0 and PA will be increased or decreased by 1, depending on the
setting of Page Increment Direction (PID, AC[2]). When PA reaches the boundary of RAM (i.e. PA = 0 or 31),
PA will be wrapped around to the other end of RAM and continue.
(3) Get Status
Action
Get Status
C/D W/R D7
0
1
D6
MX
D5
DE
D4
RS
D3
0
D2
0
D1 D0
0
BZ
0
Status flag definitions:
BZ
: Busy with internal process. When BZ=1 host interface can access if RS=0.
MX
: Status of register LC[2], mirror X.
DE
: Display enable flag. DE=1 when display enabled
RS
: Reset in progress. If RS=1, host interface will be inaccessible.
(4) Set Column Address
Action
C/D W/R D7
0
0
0
0
D6
0
0
D5
0
0
D4
0
1
D3
CA3 CA2 CA1 CA0
CA7 CA6 CA5 CA4
D2
D1 D0
Set Column Address LSB CA[3:0]
Set Column Address MSB CA[7:4]
Set the SRAM column address before Write/Read memory from host interface.
0
0
CA possible value=
0-131
(5) Set Gain
Action
C/D W/R D7
0
0
D6
0
D5
1
D4
0
D3
0
D2
GN2 GN1 GN0
D1 D0
Set Gain GN[2:0]
0
Program Gain (GN[2:0]) . See section LCD V
OLTAGE
S
ETTING
for more detail.
GN[2:0]
000 001 010 011 100 101 110 111
Gain
1.43 1.58 1.72 1.89 2.08 2.28 2.49 2.72