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參數(shù)資料
| 型號： | U637H256DC25G1 |
| 英文描述： | CapStore 32K x 8 nvSRAM |
| 中文描述： | CapStore 32K的× 8非易失 |
| 文件頁數(shù)： | 12/14頁 |
| 文件大?。?/td> | 158K |
| 代理商： | U637H256DC25G1 |
U637H256
12
August 15, 2006
STK Control #ML0056
Rev 1.1
Once the sixth address in the sequence has been
entered, the STORE cycle will commence and the chip
will be disabled. It is important that READ cycles and
not WRITE cycles be used in the sequence, although it
is not necessary that G be LOW for the sequence to be
valid. After the t
STORE
cycle time has been fulfilled, the
SRAM will again be activated for READ and WRITE
operation. When V
CC
< V
SWITCH
all software STORE
operations will be inhibited.
Any SRAM WRITE cycles requested after the V
CC
pin
drops below V
SWITCH
will be inhibited.
Software Nonvolatile RECALL
A RECALL cycle of the EEPROM data into the SRAM
is initiated with a sequence of READ operations in a
manner similar to the STORE initiation. To initiate the
RECALL cycle the following sequence of READ opera-
tions must be performed:
1.
2.
3.
4.
5.
6.
Read addresses 0E38
Read addresses 31C7
Read addresses 03E0
Read addresses 3C1F (hex) Valid READ
Read addresses 303F
Read addresses 0C63
(hex) Valid READ
(hex) Valid READ
(hex) Valid READ
(hex) Valid READ
(hex) Initiate RECALL
Cycle
Internally, RECALL is a two step procedure. First, the
SRAM data is cleared and second, the nonvolatile
information is transferred into the SRAM cells. After
t
d(E)R
cycle time the SRAM will once again be ready for
READ and WRITE operations.The RECALL operation
in no way alters the data in the EEPROM cells. The
nonvolatile data can be recalled an unlimited number of
times.
Low Average Active Power
The U637H256 has been designed to draw significantly
less power when E is LOW (chip enabled) but the
access cycle time is longer than 55 ns.
When E is HIGH the chip consumes only standby cur-
rent.
The overall average current drawn by the part depends
on the following items:
1. CMOS or TTL input levels
2. the time during which the chip is disabled (E HIGH)
3. the cycle time for accesses (E LOW)
4. the ratio of READs to WRITEs
5. the operating temperature
6. the V
CC
level
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
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