參數(shù)資料
型號: U63764DK70G1
廠商: Electronic Theatre Controls, Inc.
英文描述: CapStore 8K x 8 nvSRAM
中文描述: CapStore 8K的× 8非易失
文件頁數(shù): 1/14頁
文件大?。?/td> 146K
代理商: U63764DK70G1
U63764
Obsolete - Not Recommended for New Designs
1
March 31, 2006
STK Control #ML0055
Rev 1.0
CapStore
8K x 8 nvSRAM
Pin Configuration
Pin Description
Top View
1
2
3
n.c.
A12
A7
VCC
W
n.c.
28
27
26
4
5
6
7
8
9
10
11
A6
A5
A4
A3
A2
A1
A0
A8
A9
A11
G
A10
E
DQ7
DQ6
25
24
23
22
21
20
19
18
12
13
14
DQ1
DQ2
VSS
DQ5
DQ4
DQ3
17
16
15
DQ0
PDIP
Signal Name
Signal Description
A0 - A12
DQ0 - DQ7
Address Inputs
Data In/Out
Chip Enable
Output Enable
Write Enable
Power Supply Voltage
Ground
E
G
W
VCC
VSS
CMOS non-volatile static RAM
8192 x 8 bits
70 ns Access Time
35 ns Output Enable Access Time
I
CC
= 15 mA at 200 ns Cycle Time
Unlimited Read and Write Cycles
to SRAM
Automatic STORE to EEPROM
on Power Down using charge
stored in an integrated capacitor
Software initiated STORE
Automatic STORE Timing
10
5
STORE cycles to EEPROM
10 years data retention in
EEPROM
Automatic RECALL on Power Up
Software RECALL Initiation
Unlimited RECALL cycles from
EEPROM
Single 5 V
±
10 % Operation
Operating temperature range:
0 to 70
-40 to 85
QS 9000 Quality Standard
ESD protection > 2000 V
(MIL STD 883C M3015.7)
RoHS compliance and Pb- free
Package:
PDIP28 (600 mil)
°
C
°
C
The U63764 has two separate
modes of operation: SRAM mode
and nonvolatile mode. In SRAM
mode, the memory operates as an
ordinary static RAM. In non-volatile
operation, data is transferred in
parallel from SRAM to EEPROM or
from EEPROM to SRAM. In this
mode SRAM functions are disab-
led.
The U63764 is a static RAM with a
non-volatile electrically erasable
PROM (EEPROM) element incor-
porated in each static memory cell.
The SRAM can be read and written
an unlimited number of times, while
independent nonvolatile data resi-
des in EEPROM. Data transfers
from the SRAM to the EEPROM
(the STORE operation) take place
automatically upon power down
using charge stored in an integra-
ted capacitor. Transfers from the
EEPROM to the SRAM (the
RECALL operation) take place
automatically on power up. The
U63764 combines the ease of use
of an SRAM with nonvolatile data
integrity.
STORE cycles also may be initia-
ted under user control via a soft-
ware sequence.
Once a STORE cycle is initiated,
further input or output are disabled
until the cycle is completed.
Because a sequence of addresses
is used for STORE initiation, it is
important that no other read or
write accesses intervene in the
sequence or the sequence will be
aborted.
RECALL cycles may also be initia-
ted by a software sequence.
Internally, RECALL is a two step
procedure. First, the SRAM data is
cleared and second, the nonvola-
tile information is transferred into
the SRAM cells.
The RECALL operation in no way
alters the data in the EEPROM
cells. The nonvolatile data can be
recalled an unlimited number of
times.
The U63764 is pin compatible with
standard SRAMs and standard bat-
tery backed SRAMs.
Features
Description
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