
8
December 12, 1997
U631H16
n:
o:
p:
q: An automatic RECALL also takes place at power up, starting when V
exceeds V
SWITCH
and takes t
RESTORE
. V
CC
must not drop below
V
SWITCH
once it has been exceeded for the RECALL to function properly.
r:
Noise on the E pin may trigger multiple READ cycles from the same address and abort the address sequence.
s: If the Chip Enable Pulse Width is less than t
(see Read Cycle) but greater than or equal t
w(E)SR
, than the data may not be valid at
the end of the low pulse, however the STORE or RECALL will still be initiated.
The software sequence is clocked with E controlled READs.
Once the software controlled STORE or RECALL cycle is initiated, it completes automatically, ignoring all inputs.
Note that STORE cycles (but not RECALL) are aborted by V
CC
< V
SWITCH
(STORE inhibit).
No. Software Controlled STORE/RECALL
Cycle
l, n
Symbol
25
35
45
Unit
Alt.
IEC
Min.
Max.
Min.
Max.
Min.
Max.
25 STORE/RECALL Initiation Time
t
AVAV
t
cR
25
35
45
ns
26 Chip Enable to Output Inactive
o
t
ELQZ
t
dis(E)SR
600
600
600
ns
27 STORE Cycle Time
p
t
ELQXS
t
d(E)S
10
10
10
ms
28 RECALL Cycle Time
q
t
ELQXR
t
d(E)R
20
20
20
μ
s
29 Address Setup to Chip Enable
r
t
AVELN
t
su(A)SR
0
0
0
ns
30 Chip Enable Pulse Width
r, s
t
ELEHN
t
w(E)SR
20
25
35
ns
31 Chip Disable to Address Change
r
t
EHAXN
t
h(A)SR
0
0
0
ns
t:
W must be HIGH when E is LOW during the address sequence in order to initiate a nonvolatile cycle. G may be either HIGH or LOW
throughout. Addresses 1 through 6 are found in the mode selection table. Address 6 determines whether the U631H16 performs a STORE
or RECALL.
E must be used to clock in the address sequence for the Software controlled STORE and RECALL cycles.
u:
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAA
AAA
AAA
AAA
Ai
E
DQi
Output
t
cR
ADDRESS 1
VALID
VALID
SOFTWARE CONTROLLED STORE/RECALL CYCLE
r, s, t, u
(E = HIGH after STORE initiation)
ADDRESS 6
25
25
t
cR
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AA
AA
AA
AA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAA
AAA
AAA
AAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
Ai
E
DQi
Output
t
cR
t
w(E)SR
ADDRESS 1
VALID
VALID
ADDRESS 6
t
d(E)S
/ t
d(E)R
27
28
/
25
t
h(A)SR
31
30
t
su(A)SR
29
t
dis(E)SR
26
t
h(A)SR
31
t
su(A)SR
29
t
w(E)SR
t
h(A)SR
31
30
t
su(A)SR
29
5
t
dis(E)
SOFTWARE CONTROLLED STORE/RECALL CYCLE
r, s, t, u
(E = LOW after STORE initiation)
t
dis(E)SR
26
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
t
d(E)S
/ t
d(E)R
27
28
/
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
t
w(E)SR
t
h(A)SR
31
30
t
su(A)SR
29
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
AAAA
High Impedance
High Impedance