
U6081B
TELEFUNKEN Semiconductors
Rev. A1, 14-Feb-97
3 (8)
V
T100
High switching threshold (100% duty cycle)
V
T
100
High switching threshold(
100% duty cycle)
V
TL
Low switching threshold
1
,
2
and
3
are fixed constant.
The above mentioned threshold voltages are calculated
for the following values given in the data sheet.
V
Batt
= 12 V, I
S
= 4 mA, R
3
= 150 ,
1
= 0.7,
2
= 0.67 and
3
= 0.28.
V
T100
(12 V
4 mA
150
)
0.7
8 V
V
T
100
11.4 V
0.67
7.6 V
V
TL
11.4 V
0.28
3.2 V
For a duty cycle of 100%, an oscillator frequency, f, is as
follows:
f
I
osc
2
(V
T100
V
TL
)
C
2
, whereas C
2
and I
osc
22 nF
40
A
Therefore:
f
40
A
2
(8 V
3.2 V)
22 nF
189 Hz
For a duty cycle of less than 100%, the oscillator
frequency, f, is as follows:
f
I
osc
2
(V
T
100
V
TL
)
C
2
4
V
Batt
C
4
whereas
C
4
= 470 pF
f
40
22 nF
A
2
(7.6 V
3.2 V)
4
12 V
470 pF
185 Hz
A selection of different values of C
2
and C
4
, provides a
range of oscillator frequency, f, from 10 to 2000 Hz.
Pins 5 and 6, Short-Circuit Protection and
Current Sensing
1. Short-Circuit Detection and Time Delay, t
d
The lamp current is monitored by means of an external
shunt resistor. If the lamp current exceeds the threshold
for the short-circuit detection circuit (V
T2
duty cycle is switched over to 100% and the capacitor C
5
is charged by a current source of 20 A (I
ch
– I
dis
). The
external FET is switched off after the cut-off threshold
(V
T5
) is reached. Renewed switching on the FET is
possible only after a power-on reset. The current source,
I
dis,
ensures that the capacitor C
5
is not charged by
parasitic currents. The capacitor C
5
is discharged by
I
dis
to typ. 0.7 V.
90 mV), the
Time delay, t
d
, is as follows:
t
d
C
5
(V
T5
With C
5
= 330 nF and V
T5
= 9.8 V, (I
ch
– I
dis
) = 20 A,
we have
0.7 V) (I
ch
I
dis
)
t
d
330 nF
150 ms.
(9.8 V
0.7 V) 20
A
2. Current Limitation
The lamp current is limited by a control amplifier to pro-
tect the external power transistor. The voltage drop across
an external shunt resistor acts as the measured variable.
Current limitation takes place for a voltage drop of
V
T1
100 mV.
Owing
V
T1
–V
T2
10 mV it is ensured that current limitation
occurs only when the short circuit detection circuit has
responded.
to
the
difference
After a power-on reset, the output is inactive for an half
oscillator cycle. During this time, the supply voltage
capacitor can be charged so that the current limitation is
guaranteed in the event of a short circuit when the IC is
switched on for the first time.
Pins 7 and 8, Charge Pump and Output
Output, Pin 8, is suitable for controlling a power
MOSFET. During the active integration phase, the supply
current of the operational amplifier is mainly supplied by
the capacitor C
3
(bootstrapping). Additionally, a trickle
charge is generated by an integrated oscillator
(f
7
400 kHz) and a voltage doubler circuit. This
permits a gate voltage supply at a duty cycle of 100%.