U4084B
TELEFUNKEN Semiconductors
Rev. A1, 31-Jan-97
Preliminary Information
4 (26)
Pin Description
Pin
1
2
3
Symbol
GND
NC
CD
Function
Ground
Not connected
Chip disable.
A logic LOW (< 0.8 V) sets normal
operation. A logic HIGH (> 2.0 V)
disables the IC to conserve power.
The input impedance is nominally
90 k
Supply voltage 2.8 to 6.5 V,
approximately @ 4 mA.
The AGC circuit reduces the receive
attenuator gain @ 25 dB.
Receive mode @ 2.8 V.
Transmit attenuator output.
The DC level is approximately V
B
.
Transmit attenuator input.
Max. signal level is 350 mV
rms
.
The input impedance is approxi-
mately 10 k
Microphone amplifier output.
The gain is set by external resistors.
Microphone amplifier input.
The bias voltage is approximately
V
B
.
Mute input.
A logic LOW (< 0.8 V) sets normal
operation. A logic HIGH (> 2.0 V)
mutes the microphone amplifier
without affecting the rest of the
circuit. The input impedance is
nominally 90 k
Volume control input.
When VCI = V
B
, the receive attenu-
ator is at maximum gain in the
receive mode.
When VCI = 0.3 V
B
, the receive
gain is 35 dB lower. This does not
affect the transmit mode.
4
V
S
5
TO
6
TI
7
MICO
8
MIC
9
MUTE
10
VCI
Pin
11
Symbol
C
T
Function
Response time.
An RC at this pin sets the response
time for the circuit to switch modes.
Output voltage
≈
V
S/2
.
It is a system AC ground, and biases
the volume control. A filter cap is
required.
An RC at this pin sets the time
constant for the transmit background
monitor.
Transmit-level detector input on the
microphone/ speaker side.
Transmit-level detector output on
the microphone/ speaker side, and
input to the transmit background
monitor.
Receive-level detector output on the
microphone/ speaker side
Receive-level detector input on the
microphone/ speaker side
Input receive attenuator and dial-
tone detector.
The max. input level is 350 mV
rms
.
The input impedance is approxi-
mately 10 k
Receive attenuator output.
DC level is approximately V
B
.
Transmit-level detector input on the
line side
Transmit-level detector output on
the line side
Receive-level detector output on the
line side, and input to the receive
background monitor
Receive-level detector input on the
line side
An RC at this pin sets the time
constant for the receive background
monitor
12
V
B
13
CPT
14
TLI2
15
TLO2
16
RLO2
17
RLI2
18
RI
19
RECO
20
TLI1
21
TLO1
22
RLO1
23
RLI1
24
CPR