參數(shù)資料
型號: TZA1035HL
廠商: NXP SEMICONDUCTORS
元件分類: 消費家電
英文描述: High speed advanced analog DVD signal processor and laser supply
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-313-2, MS-026, LQFP-48
文件頁數(shù): 20/48頁
文件大?。?/td> 199K
代理商: TZA1035HL
2003 Jun 03
20
Philips Semiconductors
Preliminary specification
High speed advanced analog DVD signal
processor and laser supply
TZA1035HL
7.3.5
R
EGISTER
4: RF
LEFT AND RIGHT
,
OR SUM OFFSET COMPENSATION
Table 10
Register address 4H
Table 11
Description of register bits (address 4H)
7.3.6
R
EGISTER
5: RF
SUM OFFSET COMPENSATION
Table 12
Register address 5H
Table 13
Description of register bits (address 5H)
BIT
15
14
13
12
11
10
9
8
SYMBOL
AD3
AD2
AD1
AD0
RF
OFFSL
5
RF
OFFSL
4
RF
OFFSL
3
RF
OFFSL
2
BIT
7
6
5
4
3
2
1
0
SYMBOL
RF
OFFSL
1 RF
OFFSL
0
RF
OFFSR
5/
RF
OFFSS
5
RF
OFFSR
4/
RF
OFFSS
4
RF
OFFSR
3/
RF
OFFSS
3
RF
OFFSR
2/
RF
OFFSS
2
RF
OFFSR
1/
RF
OFFSS
1
RF
OFFSR
0/
RF
OFFSS
0
BIT
SYMBOL
FUNCTION
15 to 12
11 to 6
AD[3:0]
RF
OFFSL
[5:0]
0100 = address 4H
Left channel RF offset compensation definition.
bit RFSUM = 0: left RF channel offset compensation value
bit RFSUM = 1: not used
Right channel RF offset compensation definition.
bit RFSUM = 0: right RF channel offset compensation value (symbol is RF
OFFSR
)
bit RFSUM = 1 and bit DPD_DCC = 1: not used
bit RFSUM = 1 and bit DPD_DCC = 0: the decoder controls DPD and RFSUM
channels automatically, in parallel and with same values (symbol is RF
OFFSS
).
5 to 0
RF
OFFSR
[5:0]
BIT
15
14
13
12
11
10
9
8
SYMBOL
AD3
AD2
AD1
AD0
BIT
7
6
5
4
3
2
1
0
SYMBOL
RF
OFFSS
5
RF
OFFSS
4
RF
OFFSS
3
RF
OFFSS
2
RF
OFFSS
1
RF
OFFSS
0
BIT
SYMBOL
FUNCTION
15 to 12
11 to 6
5 to 0
AD[3:0]
RF
OFFSS
[5:0]
0101 = address 5H
not used
RF offset compensation definition
bit RFSUM = 0: not used
bit RFSUM = 1 and bit DPD_DCC = 0: not used
bit RFSUM = 1 and bit DPD_DCC = 1: the decoder controls RFSUM channels;
the DPD channels can be set independently from the microprocessor.
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