4. Load capacitors (C1,C2), feedback resistor (RF) and series resistor (RS) are incorporated internally when RANGE = HGO =
0.
5. This parameter is characterized and not tested on each device.
6. Proper PC board layout procedures must be followed to achieve specifications.
7. This specification applies to any time the FLL reference source or reference divider is changed, trim value changed,
DMX32 bit is changed, DRS bit is changed, or changing from FLL disabled (FBELP, FBILP) to FLL enabled (FEI, FEE,
FBE, FBI). If a crystal/resonator is being used as the reference, this specification assumes it is already running.
8. Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum fBus.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage
for a given interval.
XOSC
EXTAL
XTAL
Crystal or Resonator
RS
C2
RF
C1
Figure 11. Typical crystal or resonator circuit
6.2 NVM specifications
This section provides details about program/erase times and program-erase endurance for
the flash and EEPROM memories.
Table 10. Flash characteristics
C
Characteristic
Symbol
D
Supply voltage for program/erase -40
°C to 105 °C
Vprog/erase
2.7
—
5.5
V
D
Supply voltage for read operation
VRead
2.7
—
5.5
V
D
NVM Bus frequency
fNVMBUS
1
—
25
MHz
D
NVM Operating frequency
fNVMOP
0.8
—
1.05
MHz
D
Erase Verify All Blocks
tVFYALL
—
17030
tcyc
D
Erase Verify Flash Block
tRD1BLK
—
16977
tcyc
D
Erase Verify EEPROM Block
tRD1BLK
—
843
tcyc
D
Erase Verify Flash Section
tRD1SEC
—
517
tcyc
D
Erase Verify EEPROM Section
tDRD1SEC
0.10
0.11
ms
Table continues on the next page...
Peripheral operating requirements and behaviors
MC9S08PT60 Series Data Sheet, Rev. 3, 4/2012.
20
Freescale Semiconductor, Inc.