參數(shù)資料
型號(hào): TWR-S08PT60-KIT
廠商: Freescale Semiconductor
文件頁數(shù): 11/37頁
文件大?。?/td> 0K
描述: TOWER SYSTEM KIT S08PT60
標(biāo)準(zhǔn)包裝: 1
系列: S08
類型: MCU
適用于相關(guān)產(chǎn)品: Freescale 電源塔系統(tǒng)
所含物品: 4 個(gè)板,線纜,DVD
Table 9. XOSC and ICS specifications (temperature range = -40 to 105 °C ambient)
(continued)
Num
C
Characteristic
Symbol
Min
Max
Unit
3
D
Feedback
resistor
Low Frequency, Low-
Power Mode4
RF
M
Low Frequency, High-Gain
Mode
10
M
High Frequency, Low-
Power Mode
1
M
High Frequency, High-Gain
Mode
1
M
4
D
Series resistor -
Low Frequency
Low-Power Mode 4
RS
k
High-Gain Mode
200
k
5
D
Series resistor -
High Frequency
Low-Power Mode4
RS
k
D
Series resistor -
High
Frequency,
High-Gain
Mode
1 MHz
6.6
k
D
2 MHz
3.3
k
D
4 MHz
0
k
D
8 MHz
0
k
D
16 MHz
0
k
6
C
Crystal start-up
time Low range
= 32.768 KHz
crystal; High
range = 20
MHz crystal5, 6
Low range, low power
tCSTL
1000
ms
C
Low range, high power
800
ms
C
High range, low power
tCSTH
3
ms
C
High range, high power
1.5
ms
7
T
Internal reference start-up time
tIRST
20
50
s
8
D
Square wave
input clock
frequency
FEE or FBE mode2
fextal
0.03125
5
MHz
D
FBELP mode
0
20
MHz
9
P
Average internal reference frequency -
trimmed
fint_t
32.768
kHz
10
P
DCO output frequency range - trimmed
fdco_t
16
20
MHz
11
P
Total deviation
of DCO output
from trimmed
Over full voltage and
temperature range
Δfdco_t
±2.0
%fdco
C
Over fixed voltage and
temperature range of 0 to
70 °C
±1.0
12
C
FLL acquisition time5, 7
tAcquire
2
ms
13
C
Long term jitter of DCO output clock
(averaged over 2 ms interval)8
CJitter
0.02
0.2
%fdco
1. Data in Typical column was characterized at 5.0 V, 25 °C or is typical recommended value.
2. When ICS is configured for FEE or FBE mode, input clock source must be divisible using RDIV to within the range of 31.25
kHz to 39.0625 kHz.
3. See crystal or resonator manufacturer's recommendation.
Peripheral operating requirements and behaviors
MC9S08PT60 Series Data Sheet, Rev. 3, 4/2012.
Freescale Semiconductor, Inc.
19
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