參數(shù)資料
型號(hào): TVP6000C
廠商: Texas Instruments, Inc.
英文描述: NTSC/PAL Digital Video Encoder
中文描述: NTSC / PAL數(shù)字視頻編碼器
文件頁(yè)數(shù): 42/57頁(yè)
文件大?。?/td> 268K
代理商: TVP6000C
2–30
2.11.29 ERCV
Subaddress: 78
7
6
5
4
3
2
1
0
ERCV[7:0]
End of raster control, RCV2, out.
Where:
ERCV[7:0] These bits along with the CBLFV2 bit in the SYN_CTRL0 register defines the ending
of the active output at pin RCV2. The upper three bits of this register are in register
BERCV, subaddress 79.
2.11.30 BERCV
Subaddress: 79
15
14
13
12
11
10
9
8
ERCV[10:8]
BRCV[10:8]
Overflow register for BRCV and ERCV fields.
Where:
ERCV[10:8]These bits along with the CBLFV2 bit in the SYN_CTRL0 register define the ending
of the active output at pin RCV2. The lower eight bits of this register are in register
ERCV, subaddress 78.
BRCV[10:8]These bits along with the CBLFV2 bit in the SYN_CTRL0 register define the
beginning of the active output at pin RCV2. The lower eight bits of this register are in
register BRCV, subaddress 77.
2.11.31 FLEN
Subaddress: 7A Default: 0x0C
7
6
5
4
3
2
1
0
FLEN[7:0]
Field length
Where:
FLEN[7:0] These bits define the number of half lines in each field. The upper two bits of this
register arer located in the FLAL register.
Length of field = (FLEN + 1) half lines
2.11.32 FAL
Subaddress: 7B Default: 0x12
7
6
5
4
3
2
1
0
FAL[7:0]
First active line of a field
Where:
FAL[7:0]
These bits define the first active line of a field. The MSB is located in the FLAL
register.
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