參數(shù)資料
型號： TTSI4K32T3BAL
英文描述： 4096-Channel, 32-Highway Time-Slot Interchanger
中文描述： 4096通道，32道時隙交換器
文件頁數(shù)： 55/64頁
文件大?。?/td> 1105K
代理商： TTSI4K32T3BAL
Data Sheet
June 2000
TTSI4K32T
4096-Channel, 32-Highway Time-Slot Interchanger
55
Lucent Technologies Inc.
Electrical Characteristics
T
A
= –40
°
C to +85
°
C; V
DD
= 3.3 V
±
10%; V
SS
= 0 V
Timing Characteristics
T
A
= –40
°
C to +85 °C; V
DD
= 3.3 V ± 10%; V
SS
= 0 V
The following timing characteristics are generated for the TTL input and output levels.
Table 44. Clock Specifications
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Input Leakage Current:
Non-pull-up Pins
Pull-up Pins
Non-pull-up I/O Pins
Pull-down Pins
Output Voltage:
Low:
DT, D[7—0]
TXD[31—0], TXOE[31—0]
TDO, INT
High:
DT, D[7—0]
TXD[31—0], TXOE[31—0]
TDO, INT
Load Capacitance:
DT, D[7—0], INT
TXD[31—0]
TXOE[31—0]
TDO
I
IL
I
IL
I
IL
I
IL
V
SS
< V
IN
< V
DD
±
10%
V
IN
= V
SS
V
SS
< V
IN
< V
DD
±
10%
V
IN
= V
DD
±
10%
—
—
—
—
—
—
—
—
10
60
70
300
μ
A
μ
A
μ
A
μ
A
V
OL
V
OH
I
OL
= –10 mA
I
OL
= –6 mA
I
OL
= –2 mA
I
OH
= 10 mA
I
OH
= 6 mA
I
OH
= 2 mA
—
—
—
2.4
2.4
2.4
—
—
—
—
—
—
0.4
0.4
0.4
—
—
—
V
V
V
V
V
V
C
L
C
L
C
L
C
L
—
—
—
—
—
—
—
—
—
—
—
—
50
25
20
70
pF
pF
pF
pF
Pin Name
Frequency
Duty Cycle
Clock Period
Stability
—
±
64 ns
±
32 ns
±
16 ns
±
8 ns
—
Rise Time
(max)
—
10 ns
10 ns
10 ns
10 ns
—
Fall Time
(max)
—
10 ns
10 ns
10 ns
10 ns
—
PCLK
CK
0 MHz—65 MHz
2.048 MHz
4.096 MHz
8.192 MHz
16.384 MHz
10 MHz
50%
±
10%
50%
±
10%
50%
±
10%
50%
±
10%
50%
±
10%
50%
±
10%
TCK
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