參數(shù)資料
型號(hào): TTSI4K32T3BAL
英文描述: 4096-Channel, 32-Highway Time-Slot Interchanger
中文描述: 4096通道,32道時(shí)隙交換器
文件頁數(shù): 44/64頁
文件大小: 1105K
代理商: TTSI4K32T3BAL
TTSI4K32T
4096-Channel, 32-Highway Time-Slot Interchanger
Data Sheet
June 2000
44
Lucent Technologies Inc.
Configuration Register Architecture
(continued)
Table 24. Test-Pattern Checker Highway Register (0x0B)
Table 25. Test-Pattern Checker Upper Time-Slot Register (0x0C)
Table 26. Test-Pattern Checker Lower Time-Slot Register (0x0D)
Table 27. Test-Pattern Checker Data Register (0x0E)
Table 28. Test-Pattern Error Injection Register (0x0F)
Bit
7—5
4—0
Symbol
CHS[4—0]
Name/Description
Reserved.
Checker Highway Select[4
0].
These 5 bits determine the receive highway to
which the test-pattern checker is connected.
Bit
7
6—0
Symbol
CKRUP[6—0]
Checker Upper Time-Slot Select[6
0].
These 7 bits determine the upper time
slot in the input highway to which the test-pattern checker is connected. All con-
tiguous time slots that lie between the lower and upper time-slot boundaries
inclusive are monitored for the test pattern. The range of time slots that can be
monitored is from 1 time slot to the entire span (32, 64, and 128 time slots for a
2.048 Mbits/s, 4.096 Mbits/s, 8.192 Mbits/s highway, respectively). If one time
slot is to be monitored, then CKRUP and CKRLOW should be set to the same
value.
Name/Description
Reserved.
Bit
7
6—0
Symbol
CKRLOW
[6—0]
Name/Description
Reserved.
Checker Lower Time-Slot Select[6
0].
These 7 bits determine the lower time
slot in the input highway to which the test-pattern checker is connected. All con-
tiguous time slots that lie between the lower and upper time-slot boundaries
inclusive are monitored for the test pattern. The range of time slots that can be
monitored is from 1 time slot to the entire span (32, 64, and 128 time slots for a
2.048 Mbits/s, 4.096 Mbits/s, 8.192 Mbits/s highway, respectively). If one time
slot is to be monitored, then CKRUP and CKRLOW should be set to the same
value.
Bit
7—0
Symbol
CTP[7—0]
Name/Description
Checker Test Pattern[7
0].
The data written here will be used for comparison
when the fixed mode is programmed into the test-pattern style register.
Bit
7—0
Symbol
BEC[7—0]
Name/Description
Bit Error Count[7
0].
This register is used to indicate the number of single bit
errors that are to be injected into the outgoing test pattern (QRSS, PRBS, or
fixed user-defined byte). This register can be programmed to inject up to 255 bit
errors. The BEI bit in the interrupt status register will indicate when all of the
errors have been injected. BEC[7—0] will automatically be reset when BEI is
set. In order to send out additional errors, BEC[7—0] should be rewritten. Errors
are injected at the rate of one per time slot.
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TTSL-13 功能描述:電線鑒定 ThermTrans, Self-Lam Label, Vinyl, 1.00" RoHS:否 制造商:TE Connectivity / Q-Cees 產(chǎn)品:Labels and Signs 類型: 材料:Vinyl 顏色:Blue 寬度:0.625 in 長度:1 in
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