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參數(shù)資料
| 型號： | TSP2100DBVT |
| 英文描述： | Analog IC |
| 中文描述： | 模擬IC |
| 文件頁數(shù)： | 10/17頁 |
| 文件大?。?/td> | 351K |
| 代理商： | TSP2100DBVT |
TPS2100, TPS2101
V
AUX
POWER-DISTRIBUTION SWITCHES
SLVS197D – JUNE 1999 – REVISED JUNE 2000
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
IN1 Switch Rise Time
vs Output Current
12
IN2 Switch Fall Time
vs Output Current
13
IN1 Switch Fall Time
vs Output Current
14
IN2 Switch Fall Time
vs Output Current
15
Output Voltage Droop
vs Output Current When Output Is Switched From IN2 to IN1
16
Inrush Current
vs Output Capacitance
17
IN1 Supply Current
vs Junction Temperature (IN1 Enabled)
18
IN1 Supply Current
vs Junction Temperature (IN1 Disabled)
19
IN2 Supply Current
vs Junction Temperature (IN2 Enabled)
20
IN2 Supply Current
vs Junction Temperature (IN2 Disabled)
21
IN1-OUT On-State Resistance
vs Junction Temperature
22
IN2-OUT On-State Resistance
vs Junction Temperature
23
Figure 12
700
650
600
500
0.01
0.1
1
10
–
t
800
850
IN1 SWTICH RISE TIME
vs
OUTPUT CURRENT
900
100
1000
750
550
CL = 100
μ
F
CL = 47
μ
F
CL = 10
μ
F
CL = 1
μ
F
CL = 0.1
μ
F
IO – Output Current – mA
s
μ
VI(IN1) = 3.3 V
VI(IN2) = 0 V
TJ = 25
°
C
Figure 13
10
1
0.1
0
1
2
3
4
5
6
100
IN2 SWTICH RISE TIME
vs
OUTPUT CURRENT
1000
7
8
9
10
–
t
CL = 100
μ
F
CL = 47
μ
F
CL = 10
μ
F
CL = 1
μ
F
CL = 0.1
μ
F
IO – Output Current – mA
s
μ
VI(IN1) = 0 V
VI(IN2) = 3.3 V
TJ = 25
°
C
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