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參數(shù)資料
| 型號： | TSC80251-SK |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8/16-bit Microcontroller with Serial Communication Interfaces |
| 中文描述： | 16位產(chǎn)品微控制器的串行通信接口 |
| 文件頁數(shù)： | 27/63頁 |
| 文件大?。?/td> | 878K |
| 代理商： | TSC80251-SK |
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27
Rev. A - May 7, 1999
TSC80251G2D
Table 33. Summary of unconditional Jump Instructions
Notes:
1. A shaded cell denotes an instruction in the C51 Architecture.
2. In internal execution only, add 1 to the number of states if the destination address is internal and odd.
3. Add 2 to the number of states if the destination address is external.
4. Add 3 to the number of states if the destination address is external.
Table 34. Summary of Call and Return Instructions
Notes:
1. A shaded cell denotes an instruction in the C51 Architecture.
2. In internal execution only, add 1 to the number of states if the destination/return address is internal and odd.
3. Add 2 to the number of states if the destination address is external.
4. Add 5 to the number of states if INTR= 1.
Absolute jump
Extended jump
Long jump
Short jump
Jump indirect
No operation
AJMP <src>
EJMP <src>
LJMP <src>
SJMP rel
JMP @A +DPTR
NOP
(PC)
←
(PC) +2; (PC)
10:0
←
src opnd
(PC)
←
(PC) + size (instr); (PC)
23:0
←
src opnd
(PC)
←
(PC) + size (instr); (PC)
15:0
←
src opnd
(PC)
←
(PC) +2; (PC)
←
(PC) +rel
(PC)
23:16
←
FFh; (PC)
15:0
←
(A) + (DPTR)
(PC)
←
(PC) +1
Mnemonic
<dest>, <src>
(1)
Comments
Binary Mode
Source Mode
Bytes
States
Bytes
States
AJMP
addr11
Absolute jump
2
3
(2)(3)
6
(2)(4)
7
(2)(4)
6
(2)(4)
5
(2)(4)
4
(2)(4)
5
(2)(4)
2
3
(2)(3)
5
(2)(4)
6
(2)(4)
5
(2)(4)
5
(2)(4)
4
(2)(4)
5
(2)(4)
EJMP
addr24
Extended jump
5
4
@DRk
Extended jump (indirect)
3
2
LJMP
@WRj
Long jump (indirect)
3
2
addr16
Long jump (direct address)
3
3
SJMP
rel
Short jump (relative address)
2
2
JMP
@A +DPTR
Jump indirect relative to the DPTR
1
1
NOP
No operation (Jump never)
1
1
1
1
Absolute call
ACALL <src>
(PC)
←
(PC) +2; push (PC)
15:0
;
(PC)
10:0
←
src opnd
(PC)
(PC) + size (instr); push (PC)
23:0
;
(PC)
23:0
←
src opnd
(PC)
←
(PC) + size (instr); push (PC)
15:0
;
(PC)
15:0
←
src opnd
pop (PC)
15:0
pop (PC)
23:0
IF [INTR= 0] THEN pop (PC)
15:0
IF [INTR= 1] THEN pop (PC)
23:0
; pop (PSW1)
(PC)
←
(PC) + size (instr);
IF [INTR= 0] THEN push (PC)
15:0
IF [INTR= 1] THEN push (PSW1); push (PC)
23:0
Binary Mode
Extended call
ECALL <src>
Long call
LCALL <src>
Return from subroutine
Extended return from subroutine
Return from interrupt
RET
ERET
RETI
Trap interrupt
TRAP
Mnemonic
<dest>, <src>
(1)
Comments
Source Mode
Bytes
States
Bytes
States
ACALL
addr11
Absolute subroutine call
2
9
(2)(3)
14
(2)(3)
14
(2)(3)
10
(2)(3)
9
(2)(3)
7
(2)
9
(2)
7
(2)(4)
12
(4)
2
9
(2)(3)
13
(2)(3)
13
(2)(3)
9
(2)(3)
9
(2)(3)
7
(2)
8
(2)
7
(2)(4)
11
(4)
ECALL
@DRk
Extended subroutine call (indirect)
3
2
addr24
Extended subroutine call
5
4
LCALL
@WRj
Long subroutine call (indirect)
3
2
addr16
Long subroutine call
3
3
RET
Return from subroutine
1
1
ERET
Extended subroutine return
3
2
RETI
Return from interrupt
1
1
TRAP
Jump to the trap interrupt vector
2
1
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